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authorTony Luck <tony.luck@intel.com>2005-04-25 16:22:44 -0400
committerTony Luck <tony.luck@intel.com>2005-04-25 16:22:44 -0400
commitf0a8d3c9ec1f82d2a41faa6c46b8db7bd5b1eb8d (patch)
tree2b01c7a6d8513e9b08749d3c9cdafdc2cbf19d6b /arch/ia64
parent0985ea8f2db87d32b0b750229889e55fed7458ef (diff)
[IA64] Need to handle lfetch in "no_context" case.
Thanks to Mark for tracking down this one. Users of __copy_from_user_inatomic() will be sad if we don't handle lfetch faults for the "no_context" case. Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/mm/fault.c9
1 files changed, 6 insertions, 3 deletions
diff --git a/arch/ia64/mm/fault.c b/arch/ia64/mm/fault.c
index da859125aaef..4174ec999dde 100644
--- a/arch/ia64/mm/fault.c
+++ b/arch/ia64/mm/fault.c
@@ -209,10 +209,13 @@ ia64_do_page_fault (unsigned long address, unsigned long isr, struct pt_regs *re
209 } 209 }
210 210
211 no_context: 211 no_context:
212 if (isr & IA64_ISR_SP) { 212 if ((isr & IA64_ISR_SP)
213 || ((isr & IA64_ISR_NA) && (isr & IA64_ISR_CODE_MASK) == IA64_ISR_CODE_LFETCH))
214 {
213 /* 215 /*
214 * This fault was due to a speculative load set the "ed" bit in the psr to 216 * This fault was due to a speculative load or lfetch.fault, set the "ed"
215 * ensure forward progress (target register will get a NaT). 217 * bit in the psr to ensure forward progress. (Target register will get a
218 * NaT for ld.s, lfetch will be canceled.)
216 */ 219 */
217 ia64_psr(regs)->ed = 1; 220 ia64_psr(regs)->ed = 1;
218 return; 221 return;