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authorMark Maule <maule@sgi.com>2005-08-03 17:06:00 -0400
committerTony Luck <tony.luck@intel.com>2005-08-11 18:37:13 -0400
commit5b53ed1f2ed6c85e2b1c39d97cc112ea32004609 (patch)
tree538fb3307b1f16928dde68c6f6ff5565be3a2efb /arch/ia64
parent735e60f4c67823a3e01655c990296e2e56574885 (diff)
[IA64-SGI] add support for TIO huge-window
Altix patch to add TIO "huge-window" address support to sn_dma_flush(). Update copyright in affected files. Signed-off-by: Mark Maule <maule@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/sn/include/tio.h6
-rw-r--r--arch/ia64/sn/include/xtalk/hubdev.h5
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c55
3 files changed, 42 insertions, 24 deletions
diff --git a/arch/ia64/sn/include/tio.h b/arch/ia64/sn/include/tio.h
index 0139124dd54a..6b2e7b75eb19 100644
--- a/arch/ia64/sn/include/tio.h
+++ b/arch/ia64/sn/include/tio.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#ifndef _ASM_IA64_SN_TIO_H 9#ifndef _ASM_IA64_SN_TIO_H
@@ -26,6 +26,10 @@
26#define TIO_ITTE_VALID_MASK 0x1 26#define TIO_ITTE_VALID_MASK 0x1
27#define TIO_ITTE_VALID_SHIFT 16 27#define TIO_ITTE_VALID_SHIFT 16
28 28
29#define TIO_ITTE_WIDGET(itte) \
30 (((itte) >> TIO_ITTE_WIDGET_SHIFT) & TIO_ITTE_WIDGET_MASK)
31#define TIO_ITTE_VALID(itte) \
32 (((itte) >> TIO_ITTE_VALID_SHIFT) & TIO_ITTE_VALID_MASK)
29 33
30#define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \ 34#define TIO_ITTE_PUT(nasid, bigwin, widget, addr, valid) \
31 REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \ 35 REMOTE_HUB_S((nasid), TIO_ITTE(bigwin), \
diff --git a/arch/ia64/sn/include/xtalk/hubdev.h b/arch/ia64/sn/include/xtalk/hubdev.h
index ca4e250cdf27..71c2b271b4c6 100644
--- a/arch/ia64/sn/include/xtalk/hubdev.h
+++ b/arch/ia64/sn/include/xtalk/hubdev.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8#ifndef _ASM_IA64_SN_XTALK_HUBDEV_H 8#ifndef _ASM_IA64_SN_XTALK_HUBDEV_H
9#define _ASM_IA64_SN_XTALK_HUBDEV_H 9#define _ASM_IA64_SN_XTALK_HUBDEV_H
@@ -16,6 +16,9 @@
16#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1) 16#define IIO_ITTE_WIDGET_MASK ((1<<IIO_ITTE_WIDGET_BITS)-1)
17#define IIO_ITTE_WIDGET_SHIFT 8 17#define IIO_ITTE_WIDGET_SHIFT 8
18 18
19#define IIO_ITTE_WIDGET(itte) \
20 (((itte) >> IIO_ITTE_WIDGET_SHIFT) & IIO_ITTE_WIDGET_MASK)
21
19/* 22/*
20 * Use the top big window as a surrogate for the first small window 23 * Use the top big window as a surrogate for the first small window
21 */ 24 */
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index b058dc2a0b9d..ae455b6b1897 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2001-2005 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/types.h> 9#include <linux/types.h>
@@ -215,8 +215,8 @@ void sn_dma_flush(uint64_t addr)
215 int is_tio; 215 int is_tio;
216 int wid_num; 216 int wid_num;
217 int i, j; 217 int i, j;
218 int bwin;
219 uint64_t flags; 218 uint64_t flags;
219 uint64_t itte;
220 struct hubdev_info *hubinfo; 220 struct hubdev_info *hubinfo;
221 volatile struct sn_flush_device_list *p; 221 volatile struct sn_flush_device_list *p;
222 struct sn_flush_nasid_entry *flush_nasid_list; 222 struct sn_flush_nasid_entry *flush_nasid_list;
@@ -233,31 +233,36 @@ void sn_dma_flush(uint64_t addr)
233 if (!hubinfo) { 233 if (!hubinfo) {
234 BUG(); 234 BUG();
235 } 235 }
236 is_tio = (nasid & 1);
237 if (is_tio) {
238 wid_num = TIO_SWIN_WIDGETNUM(addr);
239 bwin = TIO_BWIN_WINDOWNUM(addr);
240 } else {
241 wid_num = SWIN_WIDGETNUM(addr);
242 bwin = BWIN_WINDOWNUM(addr);
243 }
244 236
245 flush_nasid_list = &hubinfo->hdi_flush_nasid_list; 237 flush_nasid_list = &hubinfo->hdi_flush_nasid_list;
246 if (flush_nasid_list->widget_p == NULL) 238 if (flush_nasid_list->widget_p == NULL)
247 return; 239 return;
248 if (bwin > 0) {
249 uint64_t itte = flush_nasid_list->iio_itte[bwin];
250 240
251 if (is_tio) { 241 is_tio = (nasid & 1);
252 wid_num = (itte >> TIO_ITTE_WIDGET_SHIFT) & 242 if (is_tio) {
253 TIO_ITTE_WIDGET_MASK; 243 int itte_index;
254 } else { 244
255 wid_num = (itte >> IIO_ITTE_WIDGET_SHIFT) & 245 if (TIO_HWIN(addr))
256 IIO_ITTE_WIDGET_MASK; 246 itte_index = 0;
257 } 247 else if (TIO_BWIN_WINDOWNUM(addr))
248 itte_index = TIO_BWIN_WINDOWNUM(addr);
249 else
250 itte_index = -1;
251
252 if (itte_index >= 0) {
253 itte = flush_nasid_list->iio_itte[itte_index];
254 if (! TIO_ITTE_VALID(itte))
255 return;
256 wid_num = TIO_ITTE_WIDGET(itte);
257 } else
258 wid_num = TIO_SWIN_WIDGETNUM(addr);
259 } else {
260 if (BWIN_WINDOWNUM(addr)) {
261 itte = flush_nasid_list->iio_itte[BWIN_WINDOWNUM(addr)];
262 wid_num = IIO_ITTE_WIDGET(itte);
263 } else
264 wid_num = SWIN_WIDGETNUM(addr);
258 } 265 }
259 if (flush_nasid_list->widget_p == NULL)
260 return;
261 if (flush_nasid_list->widget_p[wid_num] == NULL) 266 if (flush_nasid_list->widget_p[wid_num] == NULL)
262 return; 267 return;
263 p = &flush_nasid_list->widget_p[wid_num][0]; 268 p = &flush_nasid_list->widget_p[wid_num][0];
@@ -283,9 +288,15 @@ void sn_dma_flush(uint64_t addr)
283 /* 288 /*
284 * For TIOCP use the Device(x) Write Request Buffer Flush Bridge 289 * For TIOCP use the Device(x) Write Request Buffer Flush Bridge
285 * register since it ensures the data has entered the coherence 290 * register since it ensures the data has entered the coherence
286 * domain, unlike PIC 291 * domain, unlike PIC.
287 */ 292 */
288 if (is_tio) { 293 if (is_tio) {
294 /*
295 * Note: devices behind TIOCE should never be matched in the
296 * above code, and so the following code is PIC/CP centric.
297 * If CE ever needs the sn_dma_flush mechanism, we will have
298 * to account for that here and in tioce_bus_fixup().
299 */
289 uint32_t tio_id = REMOTE_HUB_L(nasid, TIO_NODE_ID); 300 uint32_t tio_id = REMOTE_HUB_L(nasid, TIO_NODE_ID);
290 uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id); 301 uint32_t revnum = XWIDGET_PART_REV_NUM(tio_id);
291 302