diff options
author | Keith Owens <kaos@sgi.com> | 2005-09-11 03:23:42 -0400 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2005-09-11 17:09:12 -0400 |
commit | 05f335ea04881ecb912b572c83e281a016149169 (patch) | |
tree | 05777261418ef04a4c0896d7fa071b8f83a8e6db /arch/ia64 | |
parent | 7f613c7d2203ae137d98fc1c38abc30fd7048637 (diff) |
[IA64] MCA/INIT: remove the physical mode path from minstate.h
Remove the physical mode path from minstate.h.
Signed-off-by: Keith Owens <kaos@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r-- | arch/ia64/kernel/ivt.S | 1 | ||||
-rw-r--r-- | arch/ia64/kernel/minstate.h | 88 |
2 files changed, 18 insertions, 71 deletions
diff --git a/arch/ia64/kernel/ivt.S b/arch/ia64/kernel/ivt.S index 3ba8384cb43d..c13ca0d49c4a 100644 --- a/arch/ia64/kernel/ivt.S +++ b/arch/ia64/kernel/ivt.S | |||
@@ -69,7 +69,6 @@ | |||
69 | # define DBG_FAULT(i) | 69 | # define DBG_FAULT(i) |
70 | #endif | 70 | #endif |
71 | 71 | ||
72 | #define MINSTATE_VIRT /* needed by minstate.h */ | ||
73 | #include "minstate.h" | 72 | #include "minstate.h" |
74 | 73 | ||
75 | #define FAULT(n) \ | 74 | #define FAULT(n) \ |
diff --git a/arch/ia64/kernel/minstate.h b/arch/ia64/kernel/minstate.h index f6d8a010d99b..85ed54179afa 100644 --- a/arch/ia64/kernel/minstate.h +++ b/arch/ia64/kernel/minstate.h | |||
@@ -5,73 +5,6 @@ | |||
5 | #include "entry.h" | 5 | #include "entry.h" |
6 | 6 | ||
7 | /* | 7 | /* |
8 | * For ivt.s we want to access the stack virtually so we don't have to disable translation | ||
9 | * on interrupts. | ||
10 | * | ||
11 | * On entry: | ||
12 | * r1: pointer to current task (ar.k6) | ||
13 | */ | ||
14 | #define MINSTATE_START_SAVE_MIN_VIRT \ | ||
15 | (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ | ||
16 | ;; \ | ||
17 | (pUStk) mov.m r24=ar.rnat; \ | ||
18 | (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of RBS */ \ | ||
19 | (pKStk) mov r1=sp; /* get sp */ \ | ||
20 | ;; \ | ||
21 | (pUStk) lfetch.fault.excl.nt1 [r22]; \ | ||
22 | (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ | ||
23 | (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ | ||
24 | ;; \ | ||
25 | (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ | ||
26 | (pKStk) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ | ||
27 | ;; \ | ||
28 | (pUStk) mov r18=ar.bsp; \ | ||
29 | (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ | ||
30 | |||
31 | #define MINSTATE_END_SAVE_MIN_VIRT \ | ||
32 | bsw.1; /* switch back to bank 1 (must be last in insn group) */ \ | ||
33 | ;; | ||
34 | |||
35 | /* | ||
36 | * For mca_asm.S we want to access the stack physically since the state is saved before we | ||
37 | * go virtual and don't want to destroy the iip or ipsr. | ||
38 | */ | ||
39 | #define MINSTATE_START_SAVE_MIN_PHYS \ | ||
40 | (pKStk) mov r3=IA64_KR(PER_CPU_DATA);; \ | ||
41 | (pKStk) addl r3=THIS_CPU(ia64_mca_data),r3;; \ | ||
42 | (pKStk) ld8 r3 = [r3];; \ | ||
43 | (pKStk) addl r3=IA64_MCA_CPU_INIT_STACK_OFFSET,r3;; \ | ||
44 | (pKStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r3; \ | ||
45 | (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ | ||
46 | (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of register backing store */ \ | ||
47 | ;; \ | ||
48 | (pUStk) mov r24=ar.rnat; \ | ||
49 | (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ | ||
50 | (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ | ||
51 | (pUStk) dep r22=-1,r22,61,3; /* compute kernel virtual addr of RBS */ \ | ||
52 | ;; \ | ||
53 | (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ | ||
54 | ;; \ | ||
55 | (pUStk) mov r18=ar.bsp; \ | ||
56 | (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \ | ||
57 | |||
58 | #define MINSTATE_END_SAVE_MIN_PHYS \ | ||
59 | dep r12=-1,r12,61,3; /* make sp a kernel virtual address */ \ | ||
60 | ;; | ||
61 | |||
62 | #ifdef MINSTATE_VIRT | ||
63 | # define MINSTATE_GET_CURRENT(reg) mov reg=IA64_KR(CURRENT) | ||
64 | # define MINSTATE_START_SAVE_MIN MINSTATE_START_SAVE_MIN_VIRT | ||
65 | # define MINSTATE_END_SAVE_MIN MINSTATE_END_SAVE_MIN_VIRT | ||
66 | #endif | ||
67 | |||
68 | #ifdef MINSTATE_PHYS | ||
69 | # define MINSTATE_GET_CURRENT(reg) mov reg=IA64_KR(CURRENT);; tpa reg=reg | ||
70 | # define MINSTATE_START_SAVE_MIN MINSTATE_START_SAVE_MIN_PHYS | ||
71 | # define MINSTATE_END_SAVE_MIN MINSTATE_END_SAVE_MIN_PHYS | ||
72 | #endif | ||
73 | |||
74 | /* | ||
75 | * DO_SAVE_MIN switches to the kernel stacks (if necessary) and saves | 8 | * DO_SAVE_MIN switches to the kernel stacks (if necessary) and saves |
76 | * the minimum state necessary that allows us to turn psr.ic back | 9 | * the minimum state necessary that allows us to turn psr.ic back |
77 | * on. | 10 | * on. |
@@ -97,7 +30,7 @@ | |||
97 | * we can pass interruption state as arguments to a handler. | 30 | * we can pass interruption state as arguments to a handler. |
98 | */ | 31 | */ |
99 | #define DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA) \ | 32 | #define DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA) \ |
100 | MINSTATE_GET_CURRENT(r16); /* M (or M;;I) */ \ | 33 | mov r16=IA64_KR(CURRENT); /* M */ \ |
101 | mov r27=ar.rsc; /* M */ \ | 34 | mov r27=ar.rsc; /* M */ \ |
102 | mov r20=r1; /* A */ \ | 35 | mov r20=r1; /* A */ \ |
103 | mov r25=ar.unat; /* M */ \ | 36 | mov r25=ar.unat; /* M */ \ |
@@ -118,7 +51,21 @@ | |||
118 | SAVE_IFS; \ | 51 | SAVE_IFS; \ |
119 | cmp.eq pKStk,pUStk=r0,r17; /* are we in kernel mode already? */ \ | 52 | cmp.eq pKStk,pUStk=r0,r17; /* are we in kernel mode already? */ \ |
120 | ;; \ | 53 | ;; \ |
121 | MINSTATE_START_SAVE_MIN \ | 54 | (pUStk) mov ar.rsc=0; /* set enforced lazy mode, pl 0, little-endian, loadrs=0 */ \ |
55 | ;; \ | ||
56 | (pUStk) mov.m r24=ar.rnat; \ | ||
57 | (pUStk) addl r22=IA64_RBS_OFFSET,r1; /* compute base of RBS */ \ | ||
58 | (pKStk) mov r1=sp; /* get sp */ \ | ||
59 | ;; \ | ||
60 | (pUStk) lfetch.fault.excl.nt1 [r22]; \ | ||
61 | (pUStk) addl r1=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r1; /* compute base of memory stack */ \ | ||
62 | (pUStk) mov r23=ar.bspstore; /* save ar.bspstore */ \ | ||
63 | ;; \ | ||
64 | (pUStk) mov ar.bspstore=r22; /* switch to kernel RBS */ \ | ||
65 | (pKStk) addl r1=-IA64_PT_REGS_SIZE,r1; /* if in kernel mode, use sp (r12) */ \ | ||
66 | ;; \ | ||
67 | (pUStk) mov r18=ar.bsp; \ | ||
68 | (pUStk) mov ar.rsc=0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */ \ | ||
122 | adds r17=2*L1_CACHE_BYTES,r1; /* really: biggest cache-line size */ \ | 69 | adds r17=2*L1_CACHE_BYTES,r1; /* really: biggest cache-line size */ \ |
123 | adds r16=PT(CR_IPSR),r1; \ | 70 | adds r16=PT(CR_IPSR),r1; \ |
124 | ;; \ | 71 | ;; \ |
@@ -181,7 +128,8 @@ | |||
181 | EXTRA; \ | 128 | EXTRA; \ |
182 | movl r1=__gp; /* establish kernel global pointer */ \ | 129 | movl r1=__gp; /* establish kernel global pointer */ \ |
183 | ;; \ | 130 | ;; \ |
184 | MINSTATE_END_SAVE_MIN | 131 | bsw.1; /* switch back to bank 1 (must be last in insn group) */ \ |
132 | ;; | ||
185 | 133 | ||
186 | /* | 134 | /* |
187 | * SAVE_REST saves the remainder of pt_regs (with psr.ic on). | 135 | * SAVE_REST saves the remainder of pt_regs (with psr.ic on). |