aboutsummaryrefslogtreecommitdiffstats
path: root/arch/ia64
diff options
context:
space:
mode:
authorKeith Owens <kaos@sgi.com>2006-04-07 02:34:34 -0400
committerTony Luck <tony.luck@intel.com>2006-04-08 02:01:32 -0400
commit8cab7ccccbdd9fe3cf6b3400d5a88ecb683a5b1b (patch)
tree7d847ecf60940f7dae3e12240fc48184e68b87b8 /arch/ia64
parent958b166c00b39ff0b28ad2bbb32624b9f305a4e1 (diff)
[IA64] Failure to resume after INIT in user space
The OS INIT handler is loading incorrect values into cr.ifa on exit. This shows up as a hang when resuming after an INIT that is delivered while a cpu is in user space. Correct the value loaded into cr.ifa. Signed-off-by: Keith Owens <kaos@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/kernel/mca_asm.S10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S
index 60a464bfd9e2..6dff024cd62b 100644
--- a/arch/ia64/kernel/mca_asm.S
+++ b/arch/ia64/kernel/mca_asm.S
@@ -827,7 +827,7 @@ ia64_state_restore:
827 ld8 r9=[temp2],16 // sal_gp 827 ld8 r9=[temp2],16 // sal_gp
828 ;; 828 ;;
829 ld8 r22=[temp1],16 // pal_min_state, virtual 829 ld8 r22=[temp1],16 // pal_min_state, virtual
830 ld8 r21=[temp2],16 // prev_IA64_KR_CURRENT 830 ld8 r13=[temp2],16 // prev_IA64_KR_CURRENT
831 ;; 831 ;;
832 ld8 r16=[temp1],16 // prev_IA64_KR_CURRENT_STACK 832 ld8 r16=[temp1],16 // prev_IA64_KR_CURRENT_STACK
833 ld8 r20=[temp2],16 // prev_task 833 ld8 r20=[temp2],16 // prev_task
@@ -848,7 +848,7 @@ ia64_state_restore:
848 mov cr.iim=temp3 848 mov cr.iim=temp3
849 mov cr.iha=temp4 849 mov cr.iha=temp4
850 dep r22=0,r22,62,1 // pal_min_state, physical, uncached 850 dep r22=0,r22,62,1 // pal_min_state, physical, uncached
851 mov IA64_KR(CURRENT)=r21 851 mov IA64_KR(CURRENT)=r13
852 ld8 r8=[temp1] // os_status 852 ld8 r8=[temp1] // os_status
853 ld8 r10=[temp2] // context 853 ld8 r10=[temp2] // context
854 854
@@ -856,7 +856,7 @@ ia64_state_restore:
856 * avoid any dependencies on the algorithm in ia64_switch_to(), just 856 * avoid any dependencies on the algorithm in ia64_switch_to(), just
857 * purge any existing CURRENT_STACK mapping and insert the new one. 857 * purge any existing CURRENT_STACK mapping and insert the new one.
858 * 858 *
859 * r16 contains prev_IA64_KR_CURRENT_STACK, r21 contains 859 * r16 contains prev_IA64_KR_CURRENT_STACK, r13 contains
860 * prev_IA64_KR_CURRENT, these values may have been changed by the C 860 * prev_IA64_KR_CURRENT, these values may have been changed by the C
861 * code. Do not use r8, r9, r10, r22, they contain values ready for 861 * code. Do not use r8, r9, r10, r22, they contain values ready for
862 * the return to SAL. 862 * the return to SAL.
@@ -873,7 +873,7 @@ ia64_state_restore:
873 ;; 873 ;;
874 srlz.d 874 srlz.d
875 875
876 extr.u r19=r21,61,3 // r21 = prev_IA64_KR_CURRENT 876 extr.u r19=r13,61,3 // r13 = prev_IA64_KR_CURRENT
877 shl r20=r16,IA64_GRANULE_SHIFT // r16 = prev_IA64_KR_CURRENT_STACK 877 shl r20=r16,IA64_GRANULE_SHIFT // r16 = prev_IA64_KR_CURRENT_STACK
878 movl r21=PAGE_KERNEL // page properties 878 movl r21=PAGE_KERNEL // page properties
879 ;; 879 ;;
@@ -883,7 +883,7 @@ ia64_state_restore:
883(p6) br.spnt 1f // the dreaded cpu 0 idle task in region 5:( 883(p6) br.spnt 1f // the dreaded cpu 0 idle task in region 5:(
884 ;; 884 ;;
885 mov cr.itir=r18 885 mov cr.itir=r18
886 mov cr.ifa=r21 886 mov cr.ifa=r13
887 mov r20=IA64_TR_CURRENT_STACK 887 mov r20=IA64_TR_CURRENT_STACK
888 ;; 888 ;;
889 itr.d dtr[r20]=r21 889 itr.d dtr[r20]=r21