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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-18 12:12:14 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-04-18 12:12:14 -0400
commitfac56c2df51bc29b07b3c2dcfabf32a015a0522c (patch)
tree1ff5d84ecf4ea0bcbd42e2ef9624b5ade3810890 /arch/ia64
parent6caa15d0b84d2ea688fd31f4f172c8353463e109 (diff)
parenta6360dd37e1a144ed11e6548371bade559a1e4df (diff)
Merge commit 'v2.6.39-rc3' into for-2.6.39
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/Kconfig4
-rw-r--r--arch/ia64/include/asm/pal.h2
-rw-r--r--arch/ia64/include/asm/perfmon_default_smpl.h4
-rw-r--r--arch/ia64/include/asm/sn/bte.h2
-rw-r--r--arch/ia64/include/asm/sn/shub_mmr.h2
-rw-r--r--arch/ia64/include/asm/sn/shubio.h4
-rw-r--r--arch/ia64/kernel/cyclone.c2
-rw-r--r--arch/ia64/kernel/perfmon_default_smpl.c2
-rw-r--r--arch/ia64/kernel/smpboot.c2
-rw-r--r--arch/ia64/kernel/topology.c2
-rw-r--r--arch/ia64/kvm/process.c2
-rw-r--r--arch/ia64/lib/do_csum.S2
-rw-r--r--arch/ia64/sn/kernel/irq.c6
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_proc_fs.c42
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_dma.c2
15 files changed, 19 insertions, 61 deletions
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index c4ea0925cdbd..e5cc56ae6ce3 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -414,11 +414,11 @@ config PERMIT_BSP_REMOVE
414 support. 414 support.
415 415
416config FORCE_CPEI_RETARGET 416config FORCE_CPEI_RETARGET
417 bool "Force assumption that CPEI can be re-targetted" 417 bool "Force assumption that CPEI can be re-targeted"
418 depends on PERMIT_BSP_REMOVE 418 depends on PERMIT_BSP_REMOVE
419 default n 419 default n
420 ---help--- 420 ---help---
421 Say Y if you need to force the assumption that CPEI can be re-targetted to 421 Say Y if you need to force the assumption that CPEI can be re-targeted to
422 any cpu in the system. This hint is available via ACPI 3.0 specifications. 422 any cpu in the system. This hint is available via ACPI 3.0 specifications.
423 Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP. 423 Tiger4 systems are capable of re-directing CPEI to any CPU other than BSP.
424 This option it useful to enable this feature on older BIOS's as well. 424 This option it useful to enable this feature on older BIOS's as well.
diff --git a/arch/ia64/include/asm/pal.h b/arch/ia64/include/asm/pal.h
index 6a292505b396..2e69284df8e7 100644
--- a/arch/ia64/include/asm/pal.h
+++ b/arch/ia64/include/asm/pal.h
@@ -1669,7 +1669,7 @@ typedef union pal_vp_info_u {
1669} pal_vp_info_u_t; 1669} pal_vp_info_u_t;
1670 1670
1671/* 1671/*
1672 * Returns infomation about virtual processor features 1672 * Returns information about virtual processor features
1673 */ 1673 */
1674static inline s64 1674static inline s64
1675ia64_pal_vp_info (u64 feature_set, u64 vp_buffer, u64 *vp_info, u64 *vmm_id) 1675ia64_pal_vp_info (u64 feature_set, u64 vp_buffer, u64 *vp_info, u64 *vmm_id)
diff --git a/arch/ia64/include/asm/perfmon_default_smpl.h b/arch/ia64/include/asm/perfmon_default_smpl.h
index 74724b24c2b7..a2d560c67230 100644
--- a/arch/ia64/include/asm/perfmon_default_smpl.h
+++ b/arch/ia64/include/asm/perfmon_default_smpl.h
@@ -67,8 +67,8 @@ typedef struct {
67 unsigned long ip; /* where did the overflow interrupt happened */ 67 unsigned long ip; /* where did the overflow interrupt happened */
68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */ 68 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */
69 69
70 unsigned short cpu; /* cpu on which the overflow occured */ 70 unsigned short cpu; /* cpu on which the overflow occurred */
71 unsigned short set; /* event set active when overflow ocurred */ 71 unsigned short set; /* event set active when overflow occurred */
72 int tgid; /* thread group id (for NPTL, this is getpid()) */ 72 int tgid; /* thread group id (for NPTL, this is getpid()) */
73} pfm_default_smpl_entry_t; 73} pfm_default_smpl_entry_t;
74 74
diff --git a/arch/ia64/include/asm/sn/bte.h b/arch/ia64/include/asm/sn/bte.h
index 96798d2da7c2..cc6c4dbf53af 100644
--- a/arch/ia64/include/asm/sn/bte.h
+++ b/arch/ia64/include/asm/sn/bte.h
@@ -216,7 +216,7 @@ extern void bte_error_handler(unsigned long);
216 bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification) 216 bte_copy(0, dest, len, ((mode) | BTE_ZERO_FILL), notification)
217 217
218/* 218/*
219 * The following is the prefered way of calling bte_unaligned_copy 219 * The following is the preferred way of calling bte_unaligned_copy
220 * If the copy is fully cache line aligned, then bte_copy is 220 * If the copy is fully cache line aligned, then bte_copy is
221 * used instead. Since bte_copy is inlined, this saves a call 221 * used instead. Since bte_copy is inlined, this saves a call
222 * stack. NOTE: bte_copy is called synchronously and does block 222 * stack. NOTE: bte_copy is called synchronously and does block
diff --git a/arch/ia64/include/asm/sn/shub_mmr.h b/arch/ia64/include/asm/sn/shub_mmr.h
index 7de1d1d4b71a..a84d870f4294 100644
--- a/arch/ia64/include/asm/sn/shub_mmr.h
+++ b/arch/ia64/include/asm/sn/shub_mmr.h
@@ -459,7 +459,7 @@
459/* ==================================================================== */ 459/* ==================================================================== */
460/* Some MMRs are functionally identical (or close enough) on both SHUB1 */ 460/* Some MMRs are functionally identical (or close enough) on both SHUB1 */
461/* and SHUB2 that it makes sense to define a geberic name for the MMR. */ 461/* and SHUB2 that it makes sense to define a geberic name for the MMR. */
462/* It is acceptible to use (for example) SH_IPI_INT to reference the */ 462/* It is acceptable to use (for example) SH_IPI_INT to reference the */
463/* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */ 463/* the IPI MMR. The value of SH_IPI_INT is determined at runtime based */
464/* on the type of the SHUB. Do not use these #defines in performance */ 464/* on the type of the SHUB. Do not use these #defines in performance */
465/* critical code or loops - there is a small performance penalty. */ 465/* critical code or loops - there is a small performance penalty. */
diff --git a/arch/ia64/include/asm/sn/shubio.h b/arch/ia64/include/asm/sn/shubio.h
index 6052422a22b3..ecb8a49476b6 100644
--- a/arch/ia64/include/asm/sn/shubio.h
+++ b/arch/ia64/include/asm/sn/shubio.h
@@ -1383,7 +1383,7 @@ typedef union ii_ibcr_u {
1383 * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The * 1383 * response is capture in IXSM and IXSS, and IXSS[VALID] is set. The *
1384 * errant header is thereby captured, and no further spurious read * 1384 * errant header is thereby captured, and no further spurious read *
1385 * respones are captured until IXSS[VALID] is cleared by setting the * 1385 * respones are captured until IXSS[VALID] is cleared by setting the *
1386 * appropriate bit in IECLR.Everytime a spurious read response is * 1386 * appropriate bit in IECLR. Every time a spurious read response is *
1387 * detected, the SPUR_RD bit of the PRB corresponding to the incoming * 1387 * detected, the SPUR_RD bit of the PRB corresponding to the incoming *
1388 * message's SIDN field is set. This always happens, regarless of * 1388 * message's SIDN field is set. This always happens, regarless of *
1389 * whether a header is captured. The programmer should check * 1389 * whether a header is captured. The programmer should check *
@@ -2738,7 +2738,7 @@ typedef union ii_ippr_u {
2738/************************************************************************ 2738/************************************************************************
2739 * * 2739 * *
2740 * The following defines which were not formed into structures are * 2740 * The following defines which were not formed into structures are *
2741 * probably indentical to another register, and the name of the * 2741 * probably identical to another register, and the name of the *
2742 * register is provided against each of these registers. This * 2742 * register is provided against each of these registers. This *
2743 * information needs to be checked carefully * 2743 * information needs to be checked carefully *
2744 * * 2744 * *
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c
index d52f1f78eff2..1b811c61bdc6 100644
--- a/arch/ia64/kernel/cyclone.c
+++ b/arch/ia64/kernel/cyclone.c
@@ -31,7 +31,7 @@ static struct clocksource clocksource_cyclone = {
31 .rating = 300, 31 .rating = 300,
32 .read = read_cyclone, 32 .read = read_cyclone,
33 .mask = (1LL << 40) - 1, 33 .mask = (1LL << 40) - 1,
34 .mult = 0, /*to be caluclated*/ 34 .mult = 0, /*to be calculated*/
35 .shift = 16, 35 .shift = 16,
36 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 36 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
37}; 37};
diff --git a/arch/ia64/kernel/perfmon_default_smpl.c b/arch/ia64/kernel/perfmon_default_smpl.c
index 5f637bbfcccd..30c644ea44c9 100644
--- a/arch/ia64/kernel/perfmon_default_smpl.c
+++ b/arch/ia64/kernel/perfmon_default_smpl.c
@@ -150,7 +150,7 @@ default_handler(struct task_struct *task, void *buf, pfm_ovfl_arg_t *arg, struct
150 * current = task running at the time of the overflow. 150 * current = task running at the time of the overflow.
151 * 151 *
152 * per-task mode: 152 * per-task mode:
153 * - this is ususally the task being monitored. 153 * - this is usually the task being monitored.
154 * Under certain conditions, it might be a different task 154 * Under certain conditions, it might be a different task
155 * 155 *
156 * system-wide: 156 * system-wide:
diff --git a/arch/ia64/kernel/smpboot.c b/arch/ia64/kernel/smpboot.c
index 44f11ee411c0..14ec641003da 100644
--- a/arch/ia64/kernel/smpboot.c
+++ b/arch/ia64/kernel/smpboot.c
@@ -703,7 +703,7 @@ int migrate_platform_irqs(unsigned int cpu)
703 data->chip->irq_disable(data); 703 data->chip->irq_disable(data);
704 data->chip->irq_set_affinity(data, mask, false); 704 data->chip->irq_set_affinity(data, mask, false);
705 data->chip->irq_enable(data); 705 data->chip->irq_enable(data);
706 printk ("Re-targetting CPEI to cpu %d\n", new_cpei_cpu); 706 printk ("Re-targeting CPEI to cpu %d\n", new_cpei_cpu);
707 } 707 }
708 } 708 }
709 if (!data) { 709 if (!data) {
diff --git a/arch/ia64/kernel/topology.c b/arch/ia64/kernel/topology.c
index 0baa1bbb65fe..0e0e0cc9e392 100644
--- a/arch/ia64/kernel/topology.c
+++ b/arch/ia64/kernel/topology.c
@@ -43,7 +43,7 @@ int __ref arch_register_cpu(int num)
43{ 43{
44#ifdef CONFIG_ACPI 44#ifdef CONFIG_ACPI
45 /* 45 /*
46 * If CPEI can be re-targetted or if this is not 46 * If CPEI can be re-targeted or if this is not
47 * CPEI target, then it is hotpluggable 47 * CPEI target, then it is hotpluggable
48 */ 48 */
49 if (can_cpei_retarget() || !is_cpu_cpei_target(num)) 49 if (can_cpei_retarget() || !is_cpu_cpei_target(num))
diff --git a/arch/ia64/kvm/process.c b/arch/ia64/kvm/process.c
index bb862fb224f2..b0398740b48d 100644
--- a/arch/ia64/kvm/process.c
+++ b/arch/ia64/kvm/process.c
@@ -987,7 +987,7 @@ static void vmm_sanity_check(struct kvm_vcpu *vcpu)
987 987
988static void kvm_do_resume_op(struct kvm_vcpu *vcpu) 988static void kvm_do_resume_op(struct kvm_vcpu *vcpu)
989{ 989{
990 vmm_sanity_check(vcpu); /*Guarantee vcpu runing on healthy vmm!*/ 990 vmm_sanity_check(vcpu); /*Guarantee vcpu running on healthy vmm!*/
991 991
992 if (test_and_clear_bit(KVM_REQ_RESUME, &vcpu->requests)) { 992 if (test_and_clear_bit(KVM_REQ_RESUME, &vcpu->requests)) {
993 vcpu_do_resume(vcpu); 993 vcpu_do_resume(vcpu);
diff --git a/arch/ia64/lib/do_csum.S b/arch/ia64/lib/do_csum.S
index 6bec2fc9f5b2..1a431a5cf86f 100644
--- a/arch/ia64/lib/do_csum.S
+++ b/arch/ia64/lib/do_csum.S
@@ -201,7 +201,7 @@ GLOBAL_ENTRY(do_csum)
201 ;; 201 ;;
202(p6) adds result1[0]=1,result1[0] 202(p6) adds result1[0]=1,result1[0]
203(p9) br.cond.sptk .do_csum_exit // if (count == 1) exit 203(p9) br.cond.sptk .do_csum_exit // if (count == 1) exit
204 // Fall through to caluculate the checksum, feeding result1[0] as 204 // Fall through to calculate the checksum, feeding result1[0] as
205 // the initial value in result1[0]. 205 // the initial value in result1[0].
206 // 206 //
207 // Calculate the checksum loading two 8-byte words per loop. 207 // Calculate the checksum loading two 8-byte words per loop.
diff --git a/arch/ia64/sn/kernel/irq.c b/arch/ia64/sn/kernel/irq.c
index 7f399f9d99c7..81a1f4e6bcd8 100644
--- a/arch/ia64/sn/kernel/irq.c
+++ b/arch/ia64/sn/kernel/irq.c
@@ -227,7 +227,7 @@ void sn_set_err_irq_affinity(unsigned int irq)
227{ 227{
228 /* 228 /*
229 * On systems which support CPU disabling (SHub2), all error interrupts 229 * On systems which support CPU disabling (SHub2), all error interrupts
230 * are targetted at the boot CPU. 230 * are targeted at the boot CPU.
231 */ 231 */
232 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT)) 232 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT))
233 set_irq_affinity_info(irq, cpu_physical_id(0), 0); 233 set_irq_affinity_info(irq, cpu_physical_id(0), 0);
@@ -412,7 +412,7 @@ sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
412 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type]; 412 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
413 413
414 /* Don't force an interrupt if the irq has been disabled */ 414 /* Don't force an interrupt if the irq has been disabled */
415 if (!irqd_irq_disabled(sn_irq_info->irq_irq) && 415 if (!irqd_irq_disabled(irq_get_irq_data(sn_irq_info->irq_irq)) &&
416 pci_provider && pci_provider->force_interrupt) 416 pci_provider && pci_provider->force_interrupt)
417 (*pci_provider->force_interrupt)(sn_irq_info); 417 (*pci_provider->force_interrupt)(sn_irq_info);
418} 418}
@@ -435,7 +435,7 @@ static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
435 /* 435 /*
436 * Bridge types attached to TIO (anything but PIC) do not need this WAR 436 * Bridge types attached to TIO (anything but PIC) do not need this WAR
437 * since they do not target Shub II interrupt registers. If that 437 * since they do not target Shub II interrupt registers. If that
438 * ever changes, this check needs to accomodate. 438 * ever changes, this check needs to accommodate.
439 */ 439 */
440 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC) 440 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
441 return; 441 return;
diff --git a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
index c76d8dc3aea3..7aab87f48060 100644
--- a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
+++ b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
@@ -45,38 +45,6 @@ static int licenseID_open(struct inode *inode, struct file *file)
45 return single_open(file, licenseID_show, NULL); 45 return single_open(file, licenseID_show, NULL);
46} 46}
47 47
48/*
49 * Enable forced interrupt by default.
50 * When set, the sn interrupt handler writes the force interrupt register on
51 * the bridge chip. The hardware will then send an interrupt message if the
52 * interrupt line is active. This mimics a level sensitive interrupt.
53 */
54extern int sn_force_interrupt_flag;
55
56static int sn_force_interrupt_show(struct seq_file *s, void *p)
57{
58 seq_printf(s, "Force interrupt is %s\n",
59 sn_force_interrupt_flag ? "enabled" : "disabled");
60 return 0;
61}
62
63static ssize_t sn_force_interrupt_write_proc(struct file *file,
64 const char __user *buffer, size_t count, loff_t *data)
65{
66 char val;
67
68 if (copy_from_user(&val, buffer, 1))
69 return -EFAULT;
70
71 sn_force_interrupt_flag = (val == '0') ? 0 : 1;
72 return count;
73}
74
75static int sn_force_interrupt_open(struct inode *inode, struct file *file)
76{
77 return single_open(file, sn_force_interrupt_show, NULL);
78}
79
80static int coherence_id_show(struct seq_file *s, void *p) 48static int coherence_id_show(struct seq_file *s, void *p)
81{ 49{
82 seq_printf(s, "%d\n", partition_coherence_id()); 50 seq_printf(s, "%d\n", partition_coherence_id());
@@ -114,14 +82,6 @@ static const struct file_operations proc_license_id_fops = {
114 .release = single_release, 82 .release = single_release,
115}; 83};
116 84
117static const struct file_operations proc_sn_force_intr_fops = {
118 .open = sn_force_interrupt_open,
119 .read = seq_read,
120 .write = sn_force_interrupt_write_proc,
121 .llseek = seq_lseek,
122 .release = single_release,
123};
124
125static const struct file_operations proc_coherence_id_fops = { 85static const struct file_operations proc_coherence_id_fops = {
126 .open = coherence_id_open, 86 .open = coherence_id_open,
127 .read = seq_read, 87 .read = seq_read,
@@ -149,8 +109,6 @@ void register_sn_procfs(void)
149 proc_create("system_serial_number", 0444, sgi_proc_dir, 109 proc_create("system_serial_number", 0444, sgi_proc_dir,
150 &proc_system_sn_fops); 110 &proc_system_sn_fops);
151 proc_create("licenseID", 0444, sgi_proc_dir, &proc_license_id_fops); 111 proc_create("licenseID", 0444, sgi_proc_dir, &proc_license_id_fops);
152 proc_create("sn_force_interrupt", 0644, sgi_proc_dir,
153 &proc_sn_force_intr_fops);
154 proc_create("coherence_id", 0444, sgi_proc_dir, 112 proc_create("coherence_id", 0444, sgi_proc_dir,
155 &proc_coherence_id_fops); 113 &proc_coherence_id_fops);
156 proc_create("sn_topology", 0444, sgi_proc_dir, &proc_sn_topo_fops); 114 proc_create("sn_topology", 0444, sgi_proc_dir, &proc_sn_topo_fops);
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
index c659ad5613a0..33def666a664 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c
@@ -227,7 +227,7 @@ pcibr_dma_unmap(struct pci_dev *hwdev, dma_addr_t dma_handle, int direction)
227 * after doing the read. For PIC this routine then forces a fake interrupt 227 * after doing the read. For PIC this routine then forces a fake interrupt
228 * on another line, which is logically associated with the slot that the PIO 228 * on another line, which is logically associated with the slot that the PIO
229 * is addressed to. It then spins while watching the memory location that 229 * is addressed to. It then spins while watching the memory location that
230 * the interrupt is targetted to. When the interrupt response arrives, we 230 * the interrupt is targeted to. When the interrupt response arrives, we
231 * are sure that the DMA has landed in memory and it is safe for the driver 231 * are sure that the DMA has landed in memory and it is safe for the driver
232 * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush 232 * to proceed. For TIOCP use the Device(x) Write Request Buffer Flush
233 * Bridge register since it ensures the data has entered the coherence domain, 233 * Bridge register since it ensures the data has entered the coherence domain,