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authorTony Luck <tony.luck@intel.com>2010-08-12 12:14:56 -0400
committerTony Luck <tony.luck@intel.com>2010-08-12 12:14:56 -0400
commitb680f0979ff571836f3616dfca727b516bcc5d3d (patch)
treeac0c90740fdb8de42c91d47fae0ef4c2bf824144 /arch/ia64
parent5af568cbd55f60b5a1d174f621b273e4f585dc35 (diff)
[IA64] Fix rwsem: RWSEM_WAITING_BIAS must not be unsigned.
Some nice improvements were made to rwsem in commit: 424acaaeb3a3932d64a9b4bd59df6cf72c22d8f3 rwsem: wake queued readers when writer blocks on active read lock but this change overlooked that ia64 had defined RWSEM_WAITING_BIAS as an unsigned value, while the new code required a signed value (as it is in every other architecture). This fix suggested by the original patch author: Michel Lespinasse. Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/include/asm/rwsem.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/ia64/include/asm/rwsem.h b/arch/ia64/include/asm/rwsem.h
index e8762688e8e3..215d5454c7d3 100644
--- a/arch/ia64/include/asm/rwsem.h
+++ b/arch/ia64/include/asm/rwsem.h
@@ -40,9 +40,9 @@ struct rw_semaphore {
40}; 40};
41 41
42#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000) 42#define RWSEM_UNLOCKED_VALUE __IA64_UL_CONST(0x0000000000000000)
43#define RWSEM_ACTIVE_BIAS __IA64_UL_CONST(0x0000000000000001) 43#define RWSEM_ACTIVE_BIAS (1L)
44#define RWSEM_ACTIVE_MASK __IA64_UL_CONST(0x00000000ffffffff) 44#define RWSEM_ACTIVE_MASK (0xffffffffL)
45#define RWSEM_WAITING_BIAS -__IA64_UL_CONST(0x0000000100000000) 45#define RWSEM_WAITING_BIAS (-0x100000000L)
46#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS 46#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
47#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) 47#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
48 48