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authorRobin Holt <holt@sgi.com>2009-02-03 19:40:59 -0500
committerTony Luck <aegl@agluck-desktop.(none)>2009-02-19 14:29:31 -0500
commit39d481cba27809598e755e184bc0d8ae1d22423e (patch)
tree15087a039ccdb05749e099e1a1a7ae39e3887a55 /arch/ia64
parent334f85b647bc46ff4d27ace55aa65f44d6a2f4db (diff)
[IA64] bte_copy of BTE_MAX_XFER trips BUG_ON.
BTE_MAX_XFER is wrong. It is one greater than the number of cache lines the BTE is actually able to transfer. If you request a transfer of exactly BTE_MAX_XFER size, you trip a very cryptic BUG_ON() which should certainly be made more clear. This patch fixes that constant and also cleans up the BUG_ON()s in arch/ia64/sn/kernel/bte.c to test one condition per line. Signed-off-by: Robin Holt <holt@sgi.com> Signed-off-by: Tony Luck <aegl@agluck-desktop.(none)>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/include/asm/sn/bte.h2
-rw-r--r--arch/ia64/sn/kernel/bte.c7
2 files changed, 5 insertions, 4 deletions
diff --git a/arch/ia64/include/asm/sn/bte.h b/arch/ia64/include/asm/sn/bte.h
index 5efecf06c9a4..96798d2da7c2 100644
--- a/arch/ia64/include/asm/sn/bte.h
+++ b/arch/ia64/include/asm/sn/bte.h
@@ -39,7 +39,7 @@
39/* BTE status register only supports 16 bits for length field */ 39/* BTE status register only supports 16 bits for length field */
40#define BTE_LEN_BITS (16) 40#define BTE_LEN_BITS (16)
41#define BTE_LEN_MASK ((1 << BTE_LEN_BITS) - 1) 41#define BTE_LEN_MASK ((1 << BTE_LEN_BITS) - 1)
42#define BTE_MAX_XFER ((1 << BTE_LEN_BITS) * L1_CACHE_BYTES) 42#define BTE_MAX_XFER (BTE_LEN_MASK << L1_CACHE_SHIFT)
43 43
44 44
45/* Define hardware */ 45/* Define hardware */
diff --git a/arch/ia64/sn/kernel/bte.c b/arch/ia64/sn/kernel/bte.c
index 9456d4034024..c6d6b62db66c 100644
--- a/arch/ia64/sn/kernel/bte.c
+++ b/arch/ia64/sn/kernel/bte.c
@@ -97,9 +97,10 @@ bte_result_t bte_copy(u64 src, u64 dest, u64 len, u64 mode, void *notification)
97 return BTE_SUCCESS; 97 return BTE_SUCCESS;
98 } 98 }
99 99
100 BUG_ON((len & L1_CACHE_MASK) || 100 BUG_ON(len & L1_CACHE_MASK);
101 (src & L1_CACHE_MASK) || (dest & L1_CACHE_MASK)); 101 BUG_ON(src & L1_CACHE_MASK);
102 BUG_ON(!(len < ((BTE_LEN_MASK + 1) << L1_CACHE_SHIFT))); 102 BUG_ON(dest & L1_CACHE_MASK);
103 BUG_ON(len > BTE_MAX_XFER);
103 104
104 /* 105 /*
105 * Start with interface corresponding to cpu number 106 * Start with interface corresponding to cpu number