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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/ia64/sn/kernel/sn2
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/ia64/sn/kernel/sn2')
-rw-r--r--arch/ia64/sn/kernel/sn2/Makefile13
-rw-r--r--arch/ia64/sn/kernel/sn2/cache.c34
-rw-r--r--arch/ia64/sn/kernel/sn2/io.c101
-rw-r--r--arch/ia64/sn/kernel/sn2/prominfo_proc.c279
-rw-r--r--arch/ia64/sn/kernel/sn2/ptc_deadlock.S82
-rw-r--r--arch/ia64/sn/kernel/sn2/sn2_smp.c295
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_hwperf.c690
-rw-r--r--arch/ia64/sn/kernel/sn2/sn_proc_fs.c149
-rw-r--r--arch/ia64/sn/kernel/sn2/timer.c36
-rw-r--r--arch/ia64/sn/kernel/sn2/timer_interrupt.c63
10 files changed, 1742 insertions, 0 deletions
diff --git a/arch/ia64/sn/kernel/sn2/Makefile b/arch/ia64/sn/kernel/sn2/Makefile
new file mode 100644
index 000000000000..170bde4549da
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/Makefile
@@ -0,0 +1,13 @@
1# arch/ia64/sn/kernel/sn2/Makefile
2#
3# This file is subject to the terms and conditions of the GNU General Public
4# License. See the file "COPYING" in the main directory of this archive
5# for more details.
6#
7# Copyright (C) 1999,2001-2002 Silicon Graphics, Inc. All rights reserved.
8#
9# sn2 specific kernel files
10#
11
12obj-y += cache.o io.o ptc_deadlock.o sn2_smp.o sn_proc_fs.o \
13 prominfo_proc.o timer.o timer_interrupt.o sn_hwperf.o
diff --git a/arch/ia64/sn/kernel/sn2/cache.c b/arch/ia64/sn/kernel/sn2/cache.c
new file mode 100644
index 000000000000..bc3cfa17cd0f
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/cache.c
@@ -0,0 +1,34 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2001-2003 Silicon Graphics, Inc. All rights reserved.
7 *
8 */
9#include <linux/module.h>
10#include <asm/pgalloc.h>
11
12/**
13 * sn_flush_all_caches - flush a range of address from all caches (incl. L4)
14 * @flush_addr: identity mapped region 7 address to start flushing
15 * @bytes: number of bytes to flush
16 *
17 * Flush a range of addresses from all caches including L4.
18 * All addresses fully or partially contained within
19 * @flush_addr to @flush_addr + @bytes are flushed
20 * from the all caches.
21 */
22void
23sn_flush_all_caches(long flush_addr, long bytes)
24{
25 flush_icache_range(flush_addr, flush_addr+bytes);
26 /*
27 * The last call may have returned before the caches
28 * were actually flushed, so we call it again to make
29 * sure.
30 */
31 flush_icache_range(flush_addr, flush_addr+bytes);
32 mb();
33}
34EXPORT_SYMBOL(sn_flush_all_caches);
diff --git a/arch/ia64/sn/kernel/sn2/io.c b/arch/ia64/sn/kernel/sn2/io.c
new file mode 100644
index 000000000000..a12c0586de38
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/io.c
@@ -0,0 +1,101 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003 Silicon Graphics, Inc. All rights reserved.
7 *
8 * The generic kernel requires function pointers to these routines, so
9 * we wrap the inlines from asm/ia64/sn/sn2/io.h here.
10 */
11
12#include <asm/sn/io.h>
13
14#ifdef CONFIG_IA64_GENERIC
15
16#undef __sn_inb
17#undef __sn_inw
18#undef __sn_inl
19#undef __sn_outb
20#undef __sn_outw
21#undef __sn_outl
22#undef __sn_readb
23#undef __sn_readw
24#undef __sn_readl
25#undef __sn_readq
26#undef __sn_readb_relaxed
27#undef __sn_readw_relaxed
28#undef __sn_readl_relaxed
29#undef __sn_readq_relaxed
30
31unsigned int __sn_inb(unsigned long port)
32{
33 return ___sn_inb(port);
34}
35
36unsigned int __sn_inw(unsigned long port)
37{
38 return ___sn_inw(port);
39}
40
41unsigned int __sn_inl(unsigned long port)
42{
43 return ___sn_inl(port);
44}
45
46void __sn_outb(unsigned char val, unsigned long port)
47{
48 ___sn_outb(val, port);
49}
50
51void __sn_outw(unsigned short val, unsigned long port)
52{
53 ___sn_outw(val, port);
54}
55
56void __sn_outl(unsigned int val, unsigned long port)
57{
58 ___sn_outl(val, port);
59}
60
61unsigned char __sn_readb(void __iomem *addr)
62{
63 return ___sn_readb(addr);
64}
65
66unsigned short __sn_readw(void __iomem *addr)
67{
68 return ___sn_readw(addr);
69}
70
71unsigned int __sn_readl(void __iomem *addr)
72{
73 return ___sn_readl(addr);
74}
75
76unsigned long __sn_readq(void __iomem *addr)
77{
78 return ___sn_readq(addr);
79}
80
81unsigned char __sn_readb_relaxed(void __iomem *addr)
82{
83 return ___sn_readb_relaxed(addr);
84}
85
86unsigned short __sn_readw_relaxed(void __iomem *addr)
87{
88 return ___sn_readw_relaxed(addr);
89}
90
91unsigned int __sn_readl_relaxed(void __iomem *addr)
92{
93 return ___sn_readl_relaxed(addr);
94}
95
96unsigned long __sn_readq_relaxed(void __iomem *addr)
97{
98 return ___sn_readq_relaxed(addr);
99}
100
101#endif
diff --git a/arch/ia64/sn/kernel/sn2/prominfo_proc.c b/arch/ia64/sn/kernel/sn2/prominfo_proc.c
new file mode 100644
index 000000000000..81c63b2f8ae9
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/prominfo_proc.c
@@ -0,0 +1,279 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1999,2001-2004 Silicon Graphics, Inc. All Rights Reserved.
7 *
8 * Module to export the system's Firmware Interface Tables, including
9 * PROM revision numbers and banners, in /proc
10 */
11#include <linux/config.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <linux/proc_fs.h>
15#include <linux/nodemask.h>
16#include <asm/system.h>
17#include <asm/io.h>
18#include <asm/sn/sn_sal.h>
19#include <asm/sn/sn_cpuid.h>
20#include <asm/sn/addrs.h>
21
22MODULE_DESCRIPTION("PROM version reporting for /proc");
23MODULE_AUTHOR("Chad Talbott");
24MODULE_LICENSE("GPL");
25
26/* Standard Intel FIT entry types */
27#define FIT_ENTRY_FIT_HEADER 0x00 /* FIT header entry */
28#define FIT_ENTRY_PAL_B 0x01 /* PAL_B entry */
29/* Entries 0x02 through 0x0D reserved by Intel */
30#define FIT_ENTRY_PAL_A_PROC 0x0E /* Processor-specific PAL_A entry */
31#define FIT_ENTRY_PAL_A 0x0F /* PAL_A entry, same as... */
32#define FIT_ENTRY_PAL_A_GEN 0x0F /* ...Generic PAL_A entry */
33#define FIT_ENTRY_UNUSED 0x7F /* Unused (reserved by Intel?) */
34/* OEM-defined entries range from 0x10 to 0x7E. */
35#define FIT_ENTRY_SAL_A 0x10 /* SAL_A entry */
36#define FIT_ENTRY_SAL_B 0x11 /* SAL_B entry */
37#define FIT_ENTRY_SALRUNTIME 0x12 /* SAL runtime entry */
38#define FIT_ENTRY_EFI 0x1F /* EFI entry */
39#define FIT_ENTRY_FPSWA 0x20 /* embedded fpswa entry */
40#define FIT_ENTRY_VMLINUX 0x21 /* embedded vmlinux entry */
41
42#define FIT_MAJOR_SHIFT (32 + 8)
43#define FIT_MAJOR_MASK ((1 << 8) - 1)
44#define FIT_MINOR_SHIFT 32
45#define FIT_MINOR_MASK ((1 << 8) - 1)
46
47#define FIT_MAJOR(q) \
48 ((unsigned) ((q) >> FIT_MAJOR_SHIFT) & FIT_MAJOR_MASK)
49#define FIT_MINOR(q) \
50 ((unsigned) ((q) >> FIT_MINOR_SHIFT) & FIT_MINOR_MASK)
51
52#define FIT_TYPE_SHIFT (32 + 16)
53#define FIT_TYPE_MASK ((1 << 7) - 1)
54
55#define FIT_TYPE(q) \
56 ((unsigned) ((q) >> FIT_TYPE_SHIFT) & FIT_TYPE_MASK)
57
58struct fit_type_map_t {
59 unsigned char type;
60 const char *name;
61};
62
63static const struct fit_type_map_t fit_entry_types[] = {
64 {FIT_ENTRY_FIT_HEADER, "FIT Header"},
65 {FIT_ENTRY_PAL_A_GEN, "Generic PAL_A"},
66 {FIT_ENTRY_PAL_A_PROC, "Processor-specific PAL_A"},
67 {FIT_ENTRY_PAL_A, "PAL_A"},
68 {FIT_ENTRY_PAL_B, "PAL_B"},
69 {FIT_ENTRY_SAL_A, "SAL_A"},
70 {FIT_ENTRY_SAL_B, "SAL_B"},
71 {FIT_ENTRY_SALRUNTIME, "SAL runtime"},
72 {FIT_ENTRY_EFI, "EFI"},
73 {FIT_ENTRY_VMLINUX, "Embedded Linux"},
74 {FIT_ENTRY_FPSWA, "Embedded FPSWA"},
75 {FIT_ENTRY_UNUSED, "Unused"},
76 {0xff, "Error"},
77};
78
79static const char *fit_type_name(unsigned char type)
80{
81 struct fit_type_map_t const *mapp;
82
83 for (mapp = fit_entry_types; mapp->type != 0xff; mapp++)
84 if (type == mapp->type)
85 return mapp->name;
86
87 if ((type > FIT_ENTRY_PAL_A) && (type < FIT_ENTRY_UNUSED))
88 return "OEM type";
89 if ((type > FIT_ENTRY_PAL_B) && (type < FIT_ENTRY_PAL_A))
90 return "Reserved";
91
92 return "Unknown type";
93}
94
95static int
96get_fit_entry(unsigned long nasid, int index, unsigned long *fentry,
97 char *banner, int banlen)
98{
99 return ia64_sn_get_fit_compt(nasid, index, fentry, banner, banlen);
100}
101
102
103/*
104 * These two routines display the FIT table for each node.
105 */
106static int dump_fit_entry(char *page, unsigned long *fentry)
107{
108 unsigned type;
109
110 type = FIT_TYPE(fentry[1]);
111 return sprintf(page, "%02x %-25s %x.%02x %016lx %u\n",
112 type,
113 fit_type_name(type),
114 FIT_MAJOR(fentry[1]), FIT_MINOR(fentry[1]),
115 fentry[0],
116 /* mult by sixteen to get size in bytes */
117 (unsigned)(fentry[1] & 0xffffff) * 16);
118}
119
120
121/*
122 * We assume that the fit table will be small enough that we can print
123 * the whole thing into one page. (This is true for our default 16kB
124 * pages -- each entry is about 60 chars wide when printed.) I read
125 * somewhere that the maximum size of the FIT is 128 entries, so we're
126 * OK except for 4kB pages (and no one is going to do that on SN
127 * anyway).
128 */
129static int
130dump_fit(char *page, unsigned long nasid)
131{
132 unsigned long fentry[2];
133 int index;
134 char *p;
135
136 p = page;
137 for (index=0;;index++) {
138 BUG_ON(index * 60 > PAGE_SIZE);
139 if (get_fit_entry(nasid, index, fentry, NULL, 0))
140 break;
141 p += dump_fit_entry(p, fentry);
142 }
143
144 return p - page;
145}
146
147static int
148dump_version(char *page, unsigned long nasid)
149{
150 unsigned long fentry[2];
151 char banner[128];
152 int index;
153 int len;
154
155 for (index = 0; ; index++) {
156 if (get_fit_entry(nasid, index, fentry, banner,
157 sizeof(banner)))
158 return 0;
159 if (FIT_TYPE(fentry[1]) == FIT_ENTRY_SAL_A)
160 break;
161 }
162
163 len = sprintf(page, "%x.%02x\n", FIT_MAJOR(fentry[1]),
164 FIT_MINOR(fentry[1]));
165 page += len;
166
167 if (banner[0])
168 len += snprintf(page, PAGE_SIZE-len, "%s\n", banner);
169
170 return len;
171}
172
173/* same as in proc_misc.c */
174static int
175proc_calc_metrics(char *page, char **start, off_t off, int count, int *eof,
176 int len)
177{
178 if (len <= off + count)
179 *eof = 1;
180 *start = page + off;
181 len -= off;
182 if (len > count)
183 len = count;
184 if (len < 0)
185 len = 0;
186 return len;
187}
188
189static int
190read_version_entry(char *page, char **start, off_t off, int count, int *eof,
191 void *data)
192{
193 int len = 0;
194
195 /* data holds the NASID of the node */
196 len = dump_version(page, (unsigned long)data);
197 len = proc_calc_metrics(page, start, off, count, eof, len);
198 return len;
199}
200
201static int
202read_fit_entry(char *page, char **start, off_t off, int count, int *eof,
203 void *data)
204{
205 int len = 0;
206
207 /* data holds the NASID of the node */
208 len = dump_fit(page, (unsigned long)data);
209 len = proc_calc_metrics(page, start, off, count, eof, len);
210
211 return len;
212}
213
214/* module entry points */
215int __init prominfo_init(void);
216void __exit prominfo_exit(void);
217
218module_init(prominfo_init);
219module_exit(prominfo_exit);
220
221static struct proc_dir_entry **proc_entries;
222static struct proc_dir_entry *sgi_prominfo_entry;
223
224#define NODE_NAME_LEN 11
225
226int __init prominfo_init(void)
227{
228 struct proc_dir_entry **entp;
229 struct proc_dir_entry *p;
230 cnodeid_t cnodeid;
231 unsigned long nasid;
232 char name[NODE_NAME_LEN];
233
234 if (!ia64_platform_is("sn2"))
235 return 0;
236
237 proc_entries = kmalloc(num_online_nodes() * sizeof(struct proc_dir_entry *),
238 GFP_KERNEL);
239
240 sgi_prominfo_entry = proc_mkdir("sgi_prominfo", NULL);
241
242 entp = proc_entries;
243 for_each_online_node(cnodeid) {
244 sprintf(name, "node%d", cnodeid);
245 *entp = proc_mkdir(name, sgi_prominfo_entry);
246 nasid = cnodeid_to_nasid(cnodeid);
247 p = create_proc_read_entry(
248 "fit", 0, *entp, read_fit_entry,
249 (void *)nasid);
250 if (p)
251 p->owner = THIS_MODULE;
252 p = create_proc_read_entry(
253 "version", 0, *entp, read_version_entry,
254 (void *)nasid);
255 if (p)
256 p->owner = THIS_MODULE;
257 entp++;
258 }
259
260 return 0;
261}
262
263void __exit prominfo_exit(void)
264{
265 struct proc_dir_entry **entp;
266 unsigned cnodeid;
267 char name[NODE_NAME_LEN];
268
269 entp = proc_entries;
270 for_each_online_node(cnodeid) {
271 remove_proc_entry("fit", *entp);
272 remove_proc_entry("version", *entp);
273 sprintf(name, "node%d", cnodeid);
274 remove_proc_entry(name, sgi_prominfo_entry);
275 entp++;
276 }
277 remove_proc_entry("sgi_prominfo", NULL);
278 kfree(proc_entries);
279}
diff --git a/arch/ia64/sn/kernel/sn2/ptc_deadlock.S b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
new file mode 100644
index 000000000000..7947312801ec
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/ptc_deadlock.S
@@ -0,0 +1,82 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
7 */
8
9#include <asm/sn/shub_mmr.h>
10
11#define DEADLOCKBIT SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_SHFT
12#define WRITECOUNTMASK SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK
13#define ALIAS_OFFSET (SH1_PIO_WRITE_STATUS_0_ALIAS-SH1_PIO_WRITE_STATUS_0)
14
15
16 .global sn2_ptc_deadlock_recovery_core
17 .proc sn2_ptc_deadlock_recovery_core
18
19sn2_ptc_deadlock_recovery_core:
20 .regstk 6,0,0,0
21
22 ptc0 = in0
23 data0 = in1
24 ptc1 = in2
25 data1 = in3
26 piowc = in4
27 zeroval = in5
28 piowcphy = r30
29 psrsave = r2
30 scr1 = r16
31 scr2 = r17
32 mask = r18
33
34
35 extr.u piowcphy=piowc,0,61;; // Convert piowc to uncached physical address
36 dep piowcphy=-1,piowcphy,63,1
37 movl mask=WRITECOUNTMASK
38
391:
40 add scr2=ALIAS_OFFSET,piowc // Address of WRITE_STATUS alias register
41 mov scr1=7;; // Clear DEADLOCK, WRITE_ERROR, MULTI_WRITE_ERROR
42 st8.rel [scr2]=scr1;;
43
445: ld8.acq scr1=[piowc];; // Wait for PIOs to complete.
45 and scr2=scr1,mask;; // mask of writecount bits
46 cmp.ne p6,p0=zeroval,scr2
47(p6) br.cond.sptk 5b
48
49
50
51 ////////////// BEGIN PHYSICAL MODE ////////////////////
52 mov psrsave=psr // Disable IC (no PMIs)
53 rsm psr.i | psr.dt | psr.ic;;
54 srlz.i;;
55
56 st8.rel [ptc0]=data0 // Write PTC0 & wait for completion.
57
585: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete.
59 and scr2=scr1,mask;; // mask of writecount bits
60 cmp.ne p6,p0=zeroval,scr2
61(p6) br.cond.sptk 5b;;
62
63 tbit.nz p8,p7=scr1,DEADLOCKBIT;;// Test for DEADLOCK
64(p7) cmp.ne p7,p0=r0,ptc1;; // Test for non-null ptc1
65
66(p7) st8.rel [ptc1]=data1;; // Now write PTC1.
67
685: ld8.acq scr1=[piowcphy];; // Wait for PIOs to complete.
69 and scr2=scr1,mask;; // mask of writecount bits
70 cmp.ne p6,p0=zeroval,scr2
71(p6) br.cond.sptk 5b
72
73 tbit.nz p8,p0=scr1,DEADLOCKBIT;;// Test for DEADLOCK
74
75 mov psr.l=psrsave;; // Reenable IC
76 srlz.i;;
77 ////////////// END PHYSICAL MODE ////////////////////
78
79(p8) br.cond.spnt 1b;; // Repeat if DEADLOCK occurred.
80
81 br.ret.sptk rp
82 .endp sn2_ptc_deadlock_recovery_core
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c
new file mode 100644
index 000000000000..7af05a7ac743
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c
@@ -0,0 +1,295 @@
1/*
2 * SN2 Platform specific SMP Support
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
9 */
10
11#include <linux/init.h>
12#include <linux/kernel.h>
13#include <linux/spinlock.h>
14#include <linux/threads.h>
15#include <linux/sched.h>
16#include <linux/smp.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <linux/mmzone.h>
20#include <linux/module.h>
21#include <linux/bitops.h>
22#include <linux/nodemask.h>
23
24#include <asm/processor.h>
25#include <asm/irq.h>
26#include <asm/sal.h>
27#include <asm/system.h>
28#include <asm/delay.h>
29#include <asm/io.h>
30#include <asm/smp.h>
31#include <asm/tlb.h>
32#include <asm/numa.h>
33#include <asm/hw_irq.h>
34#include <asm/current.h>
35#include <asm/sn/sn_cpuid.h>
36#include <asm/sn/sn_sal.h>
37#include <asm/sn/addrs.h>
38#include <asm/sn/shub_mmr.h>
39#include <asm/sn/nodepda.h>
40#include <asm/sn/rw_mmr.h>
41
42void sn2_ptc_deadlock_recovery(volatile unsigned long *, unsigned long data0,
43 volatile unsigned long *, unsigned long data1);
44
45static __cacheline_aligned DEFINE_SPINLOCK(sn2_global_ptc_lock);
46
47static unsigned long sn2_ptc_deadlock_count;
48
49static inline unsigned long wait_piowc(void)
50{
51 volatile unsigned long *piows, zeroval;
52 unsigned long ws;
53
54 piows = pda->pio_write_status_addr;
55 zeroval = pda->pio_write_status_val;
56 do {
57 cpu_relax();
58 } while (((ws = *piows) & SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK) != zeroval);
59 return ws;
60}
61
62void sn_tlb_migrate_finish(struct mm_struct *mm)
63{
64 if (mm == current->mm)
65 flush_tlb_mm(mm);
66}
67
68/**
69 * sn2_global_tlb_purge - globally purge translation cache of virtual address range
70 * @start: start of virtual address range
71 * @end: end of virtual address range
72 * @nbits: specifies number of bytes to purge per instruction (num = 1<<(nbits & 0xfc))
73 *
74 * Purges the translation caches of all processors of the given virtual address
75 * range.
76 *
77 * Note:
78 * - cpu_vm_mask is a bit mask that indicates which cpus have loaded the context.
79 * - cpu_vm_mask is converted into a nodemask of the nodes containing the
80 * cpus in cpu_vm_mask.
81 * - if only one bit is set in cpu_vm_mask & it is the current cpu,
82 * then only the local TLB needs to be flushed. This flushing can be done
83 * using ptc.l. This is the common case & avoids the global spinlock.
84 * - if multiple cpus have loaded the context, then flushing has to be
85 * done with ptc.g/MMRs under protection of the global ptc_lock.
86 */
87
88void
89sn2_global_tlb_purge(unsigned long start, unsigned long end,
90 unsigned long nbits)
91{
92 int i, shub1, cnode, mynasid, cpu, lcpu = 0, nasid, flushed = 0;
93 volatile unsigned long *ptc0, *ptc1;
94 unsigned long flags = 0, data0 = 0, data1 = 0;
95 struct mm_struct *mm = current->active_mm;
96 short nasids[MAX_NUMNODES], nix;
97 nodemask_t nodes_flushed;
98
99 nodes_clear(nodes_flushed);
100 i = 0;
101
102 for_each_cpu_mask(cpu, mm->cpu_vm_mask) {
103 cnode = cpu_to_node(cpu);
104 node_set(cnode, nodes_flushed);
105 lcpu = cpu;
106 i++;
107 }
108
109 preempt_disable();
110
111 if (likely(i == 1 && lcpu == smp_processor_id())) {
112 do {
113 ia64_ptcl(start, nbits << 2);
114 start += (1UL << nbits);
115 } while (start < end);
116 ia64_srlz_i();
117 preempt_enable();
118 return;
119 }
120
121 if (atomic_read(&mm->mm_users) == 1) {
122 flush_tlb_mm(mm);
123 preempt_enable();
124 return;
125 }
126
127 nix = 0;
128 for_each_node_mask(cnode, nodes_flushed)
129 nasids[nix++] = cnodeid_to_nasid(cnode);
130
131 shub1 = is_shub1();
132 if (shub1) {
133 data0 = (1UL << SH1_PTC_0_A_SHFT) |
134 (nbits << SH1_PTC_0_PS_SHFT) |
135 ((ia64_get_rr(start) >> 8) << SH1_PTC_0_RID_SHFT) |
136 (1UL << SH1_PTC_0_START_SHFT);
137 ptc0 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH1_PTC_0);
138 ptc1 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH1_PTC_1);
139 } else {
140 data0 = (1UL << SH2_PTC_A_SHFT) |
141 (nbits << SH2_PTC_PS_SHFT) |
142 (1UL << SH2_PTC_START_SHFT);
143 ptc0 = (long *)GLOBAL_MMR_PHYS_ADDR(0, SH2_PTC +
144 ((ia64_get_rr(start) >> 8) << SH2_PTC_RID_SHFT) );
145 ptc1 = NULL;
146 }
147
148
149 mynasid = get_nasid();
150
151 spin_lock_irqsave(&sn2_global_ptc_lock, flags);
152
153 do {
154 if (shub1)
155 data1 = start | (1UL << SH1_PTC_1_START_SHFT);
156 else
157 data0 = (data0 & ~SH2_PTC_ADDR_MASK) | (start & SH2_PTC_ADDR_MASK);
158 for (i = 0; i < nix; i++) {
159 nasid = nasids[i];
160 if (unlikely(nasid == mynasid)) {
161 ia64_ptcga(start, nbits << 2);
162 ia64_srlz_i();
163 } else {
164 ptc0 = CHANGE_NASID(nasid, ptc0);
165 if (ptc1)
166 ptc1 = CHANGE_NASID(nasid, ptc1);
167 pio_atomic_phys_write_mmrs(ptc0, data0, ptc1,
168 data1);
169 flushed = 1;
170 }
171 }
172
173 if (flushed
174 && (wait_piowc() &
175 SH_PIO_WRITE_STATUS_WRITE_DEADLOCK_MASK)) {
176 sn2_ptc_deadlock_recovery(ptc0, data0, ptc1, data1);
177 }
178
179 start += (1UL << nbits);
180
181 } while (start < end);
182
183 spin_unlock_irqrestore(&sn2_global_ptc_lock, flags);
184
185 preempt_enable();
186}
187
188/*
189 * sn2_ptc_deadlock_recovery
190 *
191 * Recover from PTC deadlocks conditions. Recovery requires stepping thru each
192 * TLB flush transaction. The recovery sequence is somewhat tricky & is
193 * coded in assembly language.
194 */
195void sn2_ptc_deadlock_recovery(volatile unsigned long *ptc0, unsigned long data0,
196 volatile unsigned long *ptc1, unsigned long data1)
197{
198 extern void sn2_ptc_deadlock_recovery_core(volatile unsigned long *, unsigned long,
199 volatile unsigned long *, unsigned long, volatile unsigned long *, unsigned long);
200 int cnode, mycnode, nasid;
201 volatile unsigned long *piows;
202 volatile unsigned long zeroval;
203
204 sn2_ptc_deadlock_count++;
205
206 piows = pda->pio_write_status_addr;
207 zeroval = pda->pio_write_status_val;
208
209 mycnode = numa_node_id();
210
211 for_each_online_node(cnode) {
212 if (is_headless_node(cnode) || cnode == mycnode)
213 continue;
214 nasid = cnodeid_to_nasid(cnode);
215 ptc0 = CHANGE_NASID(nasid, ptc0);
216 if (ptc1)
217 ptc1 = CHANGE_NASID(nasid, ptc1);
218 sn2_ptc_deadlock_recovery_core(ptc0, data0, ptc1, data1, piows, zeroval);
219 }
220}
221
222/**
223 * sn_send_IPI_phys - send an IPI to a Nasid and slice
224 * @nasid: nasid to receive the interrupt (may be outside partition)
225 * @physid: physical cpuid to receive the interrupt.
226 * @vector: command to send
227 * @delivery_mode: delivery mechanism
228 *
229 * Sends an IPI (interprocessor interrupt) to the processor specified by
230 * @physid
231 *
232 * @delivery_mode can be one of the following
233 *
234 * %IA64_IPI_DM_INT - pend an interrupt
235 * %IA64_IPI_DM_PMI - pend a PMI
236 * %IA64_IPI_DM_NMI - pend an NMI
237 * %IA64_IPI_DM_INIT - pend an INIT interrupt
238 */
239void sn_send_IPI_phys(int nasid, long physid, int vector, int delivery_mode)
240{
241 long val;
242 unsigned long flags = 0;
243 volatile long *p;
244
245 p = (long *)GLOBAL_MMR_PHYS_ADDR(nasid, SH_IPI_INT);
246 val = (1UL << SH_IPI_INT_SEND_SHFT) |
247 (physid << SH_IPI_INT_PID_SHFT) |
248 ((long)delivery_mode << SH_IPI_INT_TYPE_SHFT) |
249 ((long)vector << SH_IPI_INT_IDX_SHFT) |
250 (0x000feeUL << SH_IPI_INT_BASE_SHFT);
251
252 mb();
253 if (enable_shub_wars_1_1()) {
254 spin_lock_irqsave(&sn2_global_ptc_lock, flags);
255 }
256 pio_phys_write_mmr(p, val);
257 if (enable_shub_wars_1_1()) {
258 wait_piowc();
259 spin_unlock_irqrestore(&sn2_global_ptc_lock, flags);
260 }
261
262}
263
264EXPORT_SYMBOL(sn_send_IPI_phys);
265
266/**
267 * sn2_send_IPI - send an IPI to a processor
268 * @cpuid: target of the IPI
269 * @vector: command to send
270 * @delivery_mode: delivery mechanism
271 * @redirect: redirect the IPI?
272 *
273 * Sends an IPI (InterProcessor Interrupt) to the processor specified by
274 * @cpuid. @vector specifies the command to send, while @delivery_mode can
275 * be one of the following
276 *
277 * %IA64_IPI_DM_INT - pend an interrupt
278 * %IA64_IPI_DM_PMI - pend a PMI
279 * %IA64_IPI_DM_NMI - pend an NMI
280 * %IA64_IPI_DM_INIT - pend an INIT interrupt
281 */
282void sn2_send_IPI(int cpuid, int vector, int delivery_mode, int redirect)
283{
284 long physid;
285 int nasid;
286
287 physid = cpu_physical_id(cpuid);
288 nasid = cpuid_to_nasid(cpuid);
289
290 /* the following is used only when starting cpus at boot time */
291 if (unlikely(nasid == -1))
292 ia64_sn_get_sapic_info(physid, &nasid, NULL, NULL);
293
294 sn_send_IPI_phys(nasid, physid, vector, delivery_mode);
295}
diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
new file mode 100644
index 000000000000..197356460ee1
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c
@@ -0,0 +1,690 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2004-2005 Silicon Graphics, Inc. All rights reserved.
7 *
8 * SGI Altix topology and hardware performance monitoring API.
9 * Mark Goodwin <markgw@sgi.com>.
10 *
11 * Creates /proc/sgi_sn/sn_topology (read-only) to export
12 * info about Altix nodes, routers, CPUs and NumaLink
13 * interconnection/topology.
14 *
15 * Also creates a dynamic misc device named "sn_hwperf"
16 * that supports an ioctl interface to call down into SAL
17 * to discover hw objects, topology and to read/write
18 * memory mapped registers, e.g. for performance monitoring.
19 * The "sn_hwperf" device is registered only after the procfs
20 * file is first opened, i.e. only if/when it's needed.
21 *
22 * This API is used by SGI Performance Co-Pilot and other
23 * tools, see http://oss.sgi.com/projects/pcp
24 */
25
26#include <linux/fs.h>
27#include <linux/slab.h>
28#include <linux/vmalloc.h>
29#include <linux/seq_file.h>
30#include <linux/miscdevice.h>
31#include <linux/cpumask.h>
32#include <linux/smp_lock.h>
33#include <linux/nodemask.h>
34#include <asm/processor.h>
35#include <asm/topology.h>
36#include <asm/smp.h>
37#include <asm/semaphore.h>
38#include <asm/segment.h>
39#include <asm/uaccess.h>
40#include <asm/sal.h>
41#include <asm/sn/io.h>
42#include <asm/sn/sn_sal.h>
43#include <asm/sn/module.h>
44#include <asm/sn/geo.h>
45#include <asm/sn/sn2/sn_hwperf.h>
46
47static void *sn_hwperf_salheap = NULL;
48static int sn_hwperf_obj_cnt = 0;
49static nasid_t sn_hwperf_master_nasid = INVALID_NASID;
50static int sn_hwperf_init(void);
51static DECLARE_MUTEX(sn_hwperf_init_mutex);
52
53static int sn_hwperf_enum_objects(int *nobj, struct sn_hwperf_object_info **ret)
54{
55 int e;
56 u64 sz;
57 struct sn_hwperf_object_info *objbuf = NULL;
58
59 if ((e = sn_hwperf_init()) < 0) {
60 printk("sn_hwperf_init failed: err %d\n", e);
61 goto out;
62 }
63
64 sz = sn_hwperf_obj_cnt * sizeof(struct sn_hwperf_object_info);
65 if ((objbuf = (struct sn_hwperf_object_info *) vmalloc(sz)) == NULL) {
66 printk("sn_hwperf_enum_objects: vmalloc(%d) failed\n", (int)sz);
67 e = -ENOMEM;
68 goto out;
69 }
70
71 e = ia64_sn_hwperf_op(sn_hwperf_master_nasid, SN_HWPERF_ENUM_OBJECTS,
72 0, sz, (u64) objbuf, 0, 0, NULL);
73 if (e != SN_HWPERF_OP_OK) {
74 e = -EINVAL;
75 vfree(objbuf);
76 }
77
78out:
79 *nobj = sn_hwperf_obj_cnt;
80 *ret = objbuf;
81 return e;
82}
83
84static int sn_hwperf_geoid_to_cnode(char *location)
85{
86 int cnode;
87 geoid_t geoid;
88 moduleid_t module_id;
89 char type;
90 int rack, slot, slab;
91 int this_rack, this_slot, this_slab;
92
93 if (sscanf(location, "%03d%c%02d#%d", &rack, &type, &slot, &slab) != 4)
94 return -1;
95
96 for (cnode = 0; cnode < numionodes; cnode++) {
97 geoid = cnodeid_get_geoid(cnode);
98 module_id = geo_module(geoid);
99 this_rack = MODULE_GET_RACK(module_id);
100 this_slot = MODULE_GET_BPOS(module_id);
101 this_slab = geo_slab(geoid);
102 if (rack == this_rack && slot == this_slot && slab == this_slab)
103 break;
104 }
105
106 return cnode < numionodes ? cnode : -1;
107}
108
109static int sn_hwperf_obj_to_cnode(struct sn_hwperf_object_info * obj)
110{
111 if (!obj->sn_hwp_this_part)
112 return -1;
113 return sn_hwperf_geoid_to_cnode(obj->location);
114}
115
116static int sn_hwperf_generic_ordinal(struct sn_hwperf_object_info *obj,
117 struct sn_hwperf_object_info *objs)
118{
119 int ordinal;
120 struct sn_hwperf_object_info *p;
121
122 for (ordinal=0, p=objs; p != obj; p++) {
123 if (SN_HWPERF_FOREIGN(p))
124 continue;
125 if (SN_HWPERF_SAME_OBJTYPE(p, obj))
126 ordinal++;
127 }
128
129 return ordinal;
130}
131
132static const char *slabname_node = "node"; /* SHub asic */
133static const char *slabname_ionode = "ionode"; /* TIO asic */
134static const char *slabname_router = "router"; /* NL3R or NL4R */
135static const char *slabname_other = "other"; /* unknown asic */
136
137static const char *sn_hwperf_get_slabname(struct sn_hwperf_object_info *obj,
138 struct sn_hwperf_object_info *objs, int *ordinal)
139{
140 int isnode;
141 const char *slabname = slabname_other;
142
143 if ((isnode = SN_HWPERF_IS_NODE(obj)) || SN_HWPERF_IS_IONODE(obj)) {
144 slabname = isnode ? slabname_node : slabname_ionode;
145 *ordinal = sn_hwperf_obj_to_cnode(obj);
146 }
147 else {
148 *ordinal = sn_hwperf_generic_ordinal(obj, objs);
149 if (SN_HWPERF_IS_ROUTER(obj))
150 slabname = slabname_router;
151 }
152
153 return slabname;
154}
155
156static int sn_topology_show(struct seq_file *s, void *d)
157{
158 int sz;
159 int pt;
160 int e;
161 int i;
162 int j;
163 const char *slabname;
164 int ordinal;
165 cpumask_t cpumask;
166 char slice;
167 struct cpuinfo_ia64 *c;
168 struct sn_hwperf_port_info *ptdata;
169 struct sn_hwperf_object_info *p;
170 struct sn_hwperf_object_info *obj = d; /* this object */
171 struct sn_hwperf_object_info *objs = s->private; /* all objects */
172
173 if (obj == objs) {
174 seq_printf(s, "# sn_topology version 1\n");
175 seq_printf(s, "# objtype ordinal location partition"
176 " [attribute value [, ...]]\n");
177 }
178
179 if (SN_HWPERF_FOREIGN(obj)) {
180 /* private in another partition: not interesting */
181 return 0;
182 }
183
184 for (i = 0; obj->name[i]; i++) {
185 if (obj->name[i] == ' ')
186 obj->name[i] = '_';
187 }
188
189 slabname = sn_hwperf_get_slabname(obj, objs, &ordinal);
190 seq_printf(s, "%s %d %s %s asic %s", slabname, ordinal, obj->location,
191 obj->sn_hwp_this_part ? "local" : "shared", obj->name);
192
193 if (!SN_HWPERF_IS_NODE(obj) && !SN_HWPERF_IS_IONODE(obj))
194 seq_putc(s, '\n');
195 else {
196 seq_printf(s, ", nasid 0x%x", cnodeid_to_nasid(ordinal));
197 for (i=0; i < numionodes; i++) {
198 seq_printf(s, i ? ":%d" : ", dist %d",
199 node_distance(ordinal, i));
200 }
201 seq_putc(s, '\n');
202
203 /*
204 * CPUs on this node, if any
205 */
206 cpumask = node_to_cpumask(ordinal);
207 for_each_online_cpu(i) {
208 if (cpu_isset(i, cpumask)) {
209 slice = 'a' + cpuid_to_slice(i);
210 c = cpu_data(i);
211 seq_printf(s, "cpu %d %s%c local"
212 " freq %luMHz, arch ia64",
213 i, obj->location, slice,
214 c->proc_freq / 1000000);
215 for_each_online_cpu(j) {
216 seq_printf(s, j ? ":%d" : ", dist %d",
217 node_distance(
218 cpuid_to_cnodeid(i),
219 cpuid_to_cnodeid(j)));
220 }
221 seq_putc(s, '\n');
222 }
223 }
224 }
225
226 if (obj->ports) {
227 /*
228 * numalink ports
229 */
230 sz = obj->ports * sizeof(struct sn_hwperf_port_info);
231 if ((ptdata = vmalloc(sz)) == NULL)
232 return -ENOMEM;
233 e = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
234 SN_HWPERF_ENUM_PORTS, obj->id, sz,
235 (u64) ptdata, 0, 0, NULL);
236 if (e != SN_HWPERF_OP_OK)
237 return -EINVAL;
238 for (ordinal=0, p=objs; p != obj; p++) {
239 if (!SN_HWPERF_FOREIGN(p))
240 ordinal += p->ports;
241 }
242 for (pt = 0; pt < obj->ports; pt++) {
243 for (p = objs, i = 0; i < sn_hwperf_obj_cnt; i++, p++) {
244 if (ptdata[pt].conn_id == p->id) {
245 break;
246 }
247 }
248 seq_printf(s, "numalink %d %s-%d",
249 ordinal+pt, obj->location, ptdata[pt].port);
250
251 if (i >= sn_hwperf_obj_cnt) {
252 /* no connection */
253 seq_puts(s, " local endpoint disconnected"
254 ", protocol unknown\n");
255 continue;
256 }
257
258 if (obj->sn_hwp_this_part && p->sn_hwp_this_part)
259 /* both ends local to this partition */
260 seq_puts(s, " local");
261 else if (!obj->sn_hwp_this_part && !p->sn_hwp_this_part)
262 /* both ends of the link in foreign partiton */
263 seq_puts(s, " foreign");
264 else
265 /* link straddles a partition */
266 seq_puts(s, " shared");
267
268 /*
269 * Unlikely, but strictly should query the LLP config
270 * registers because an NL4R can be configured to run
271 * NL3 protocol, even when not talking to an NL3 router.
272 * Ditto for node-node.
273 */
274 seq_printf(s, " endpoint %s-%d, protocol %s\n",
275 p->location, ptdata[pt].conn_port,
276 (SN_HWPERF_IS_NL3ROUTER(obj) ||
277 SN_HWPERF_IS_NL3ROUTER(p)) ? "LLP3" : "LLP4");
278 }
279 vfree(ptdata);
280 }
281
282 return 0;
283}
284
285static void *sn_topology_start(struct seq_file *s, loff_t * pos)
286{
287 struct sn_hwperf_object_info *objs = s->private;
288
289 if (*pos < sn_hwperf_obj_cnt)
290 return (void *)(objs + *pos);
291
292 return NULL;
293}
294
295static void *sn_topology_next(struct seq_file *s, void *v, loff_t * pos)
296{
297 ++*pos;
298 return sn_topology_start(s, pos);
299}
300
301static void sn_topology_stop(struct seq_file *m, void *v)
302{
303 return;
304}
305
306/*
307 * /proc/sgi_sn/sn_topology, read-only using seq_file
308 */
309static struct seq_operations sn_topology_seq_ops = {
310 .start = sn_topology_start,
311 .next = sn_topology_next,
312 .stop = sn_topology_stop,
313 .show = sn_topology_show
314};
315
316struct sn_hwperf_op_info {
317 u64 op;
318 struct sn_hwperf_ioctl_args *a;
319 void *p;
320 int *v0;
321 int ret;
322};
323
324static void sn_hwperf_call_sal(void *info)
325{
326 struct sn_hwperf_op_info *op_info = info;
327 int r;
328
329 r = ia64_sn_hwperf_op(sn_hwperf_master_nasid, op_info->op,
330 op_info->a->arg, op_info->a->sz,
331 (u64) op_info->p, 0, 0, op_info->v0);
332 op_info->ret = r;
333}
334
335static int sn_hwperf_op_cpu(struct sn_hwperf_op_info *op_info)
336{
337 u32 cpu;
338 u32 use_ipi;
339 int r = 0;
340 cpumask_t save_allowed;
341
342 cpu = (op_info->a->arg & SN_HWPERF_ARG_CPU_MASK) >> 32;
343 use_ipi = op_info->a->arg & SN_HWPERF_ARG_USE_IPI_MASK;
344 op_info->a->arg &= SN_HWPERF_ARG_OBJID_MASK;
345
346 if (cpu != SN_HWPERF_ARG_ANY_CPU) {
347 if (cpu >= num_online_cpus() || !cpu_online(cpu)) {
348 r = -EINVAL;
349 goto out;
350 }
351 }
352
353 if (cpu == SN_HWPERF_ARG_ANY_CPU || cpu == get_cpu()) {
354 /* don't care, or already on correct cpu */
355 sn_hwperf_call_sal(op_info);
356 }
357 else {
358 if (use_ipi) {
359 /* use an interprocessor interrupt to call SAL */
360 smp_call_function_single(cpu, sn_hwperf_call_sal,
361 op_info, 1, 1);
362 }
363 else {
364 /* migrate the task before calling SAL */
365 save_allowed = current->cpus_allowed;
366 set_cpus_allowed(current, cpumask_of_cpu(cpu));
367 sn_hwperf_call_sal(op_info);
368 set_cpus_allowed(current, save_allowed);
369 }
370 }
371 r = op_info->ret;
372
373out:
374 return r;
375}
376
377/* map SAL hwperf error code to system error code */
378static int sn_hwperf_map_err(int hwperf_err)
379{
380 int e;
381
382 switch(hwperf_err) {
383 case SN_HWPERF_OP_OK:
384 e = 0;
385 break;
386
387 case SN_HWPERF_OP_NOMEM:
388 e = -ENOMEM;
389 break;
390
391 case SN_HWPERF_OP_NO_PERM:
392 e = -EPERM;
393 break;
394
395 case SN_HWPERF_OP_IO_ERROR:
396 e = -EIO;
397 break;
398
399 case SN_HWPERF_OP_BUSY:
400 case SN_HWPERF_OP_RECONFIGURE:
401 e = -EAGAIN;
402 break;
403
404 case SN_HWPERF_OP_INVAL:
405 default:
406 e = -EINVAL;
407 break;
408 }
409
410 return e;
411}
412
413/*
414 * ioctl for "sn_hwperf" misc device
415 */
416static int
417sn_hwperf_ioctl(struct inode *in, struct file *fp, u32 op, u64 arg)
418{
419 struct sn_hwperf_ioctl_args a;
420 struct cpuinfo_ia64 *cdata;
421 struct sn_hwperf_object_info *objs;
422 struct sn_hwperf_object_info *cpuobj;
423 struct sn_hwperf_op_info op_info;
424 void *p = NULL;
425 int nobj;
426 char slice;
427 int node;
428 int r;
429 int v0;
430 int i;
431 int j;
432
433 unlock_kernel();
434
435 /* only user requests are allowed here */
436 if ((op & SN_HWPERF_OP_MASK) < 10) {
437 r = -EINVAL;
438 goto error;
439 }
440 r = copy_from_user(&a, (const void __user *)arg,
441 sizeof(struct sn_hwperf_ioctl_args));
442 if (r != 0) {
443 r = -EFAULT;
444 goto error;
445 }
446
447 /*
448 * Allocate memory to hold a kernel copy of the user buffer. The
449 * buffer contents are either copied in or out (or both) of user
450 * space depending on the flags encoded in the requested operation.
451 */
452 if (a.ptr) {
453 p = vmalloc(a.sz);
454 if (!p) {
455 r = -ENOMEM;
456 goto error;
457 }
458 }
459
460 if (op & SN_HWPERF_OP_MEM_COPYIN) {
461 r = copy_from_user(p, (const void __user *)a.ptr, a.sz);
462 if (r != 0) {
463 r = -EFAULT;
464 goto error;
465 }
466 }
467
468 switch (op) {
469 case SN_HWPERF_GET_CPU_INFO:
470 if (a.sz == sizeof(u64)) {
471 /* special case to get size needed */
472 *(u64 *) p = (u64) num_online_cpus() *
473 sizeof(struct sn_hwperf_object_info);
474 } else
475 if (a.sz < num_online_cpus() * sizeof(struct sn_hwperf_object_info)) {
476 r = -ENOMEM;
477 goto error;
478 } else
479 if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) {
480 memset(p, 0, a.sz);
481 for (i = 0; i < nobj; i++) {
482 node = sn_hwperf_obj_to_cnode(objs + i);
483 for_each_online_cpu(j) {
484 if (node != cpu_to_node(j))
485 continue;
486 cpuobj = (struct sn_hwperf_object_info *) p + j;
487 slice = 'a' + cpuid_to_slice(j);
488 cdata = cpu_data(j);
489 cpuobj->id = j;
490 snprintf(cpuobj->name,
491 sizeof(cpuobj->name),
492 "CPU %luMHz %s",
493 cdata->proc_freq / 1000000,
494 cdata->vendor);
495 snprintf(cpuobj->location,
496 sizeof(cpuobj->location),
497 "%s%c", objs[i].location,
498 slice);
499 }
500 }
501
502 vfree(objs);
503 }
504 break;
505
506 case SN_HWPERF_GET_NODE_NASID:
507 if (a.sz != sizeof(u64) ||
508 (node = a.arg) < 0 || node >= numionodes) {
509 r = -EINVAL;
510 goto error;
511 }
512 *(u64 *)p = (u64)cnodeid_to_nasid(node);
513 break;
514
515 case SN_HWPERF_GET_OBJ_NODE:
516 if (a.sz != sizeof(u64) || a.arg < 0) {
517 r = -EINVAL;
518 goto error;
519 }
520 if ((r = sn_hwperf_enum_objects(&nobj, &objs)) == 0) {
521 if (a.arg >= nobj) {
522 r = -EINVAL;
523 vfree(objs);
524 goto error;
525 }
526 if (objs[(i = a.arg)].id != a.arg) {
527 for (i = 0; i < nobj; i++) {
528 if (objs[i].id == a.arg)
529 break;
530 }
531 }
532 if (i == nobj) {
533 r = -EINVAL;
534 vfree(objs);
535 goto error;
536 }
537 *(u64 *)p = (u64)sn_hwperf_obj_to_cnode(objs + i);
538 vfree(objs);
539 }
540 break;
541
542 case SN_HWPERF_GET_MMRS:
543 case SN_HWPERF_SET_MMRS:
544 case SN_HWPERF_OBJECT_DISTANCE:
545 op_info.p = p;
546 op_info.a = &a;
547 op_info.v0 = &v0;
548 op_info.op = op;
549 r = sn_hwperf_op_cpu(&op_info);
550 if (r) {
551 r = sn_hwperf_map_err(r);
552 goto error;
553 }
554 break;
555
556 default:
557 /* all other ops are a direct SAL call */
558 r = ia64_sn_hwperf_op(sn_hwperf_master_nasid, op,
559 a.arg, a.sz, (u64) p, 0, 0, &v0);
560 if (r) {
561 r = sn_hwperf_map_err(r);
562 goto error;
563 }
564 a.v0 = v0;
565 break;
566 }
567
568 if (op & SN_HWPERF_OP_MEM_COPYOUT) {
569 r = copy_to_user((void __user *)a.ptr, p, a.sz);
570 if (r != 0) {
571 r = -EFAULT;
572 goto error;
573 }
574 }
575
576error:
577 vfree(p);
578
579 lock_kernel();
580 return r;
581}
582
583static struct file_operations sn_hwperf_fops = {
584 .ioctl = sn_hwperf_ioctl,
585};
586
587static struct miscdevice sn_hwperf_dev = {
588 MISC_DYNAMIC_MINOR,
589 "sn_hwperf",
590 &sn_hwperf_fops
591};
592
593static int sn_hwperf_init(void)
594{
595 u64 v;
596 int salr;
597 int e = 0;
598
599 /* single threaded, once-only initialization */
600 down(&sn_hwperf_init_mutex);
601 if (sn_hwperf_salheap) {
602 up(&sn_hwperf_init_mutex);
603 return e;
604 }
605
606 /*
607 * The PROM code needs a fixed reference node. For convenience the
608 * same node as the console I/O is used.
609 */
610 sn_hwperf_master_nasid = (nasid_t) ia64_sn_get_console_nasid();
611
612 /*
613 * Request the needed size and install the PROM scratch area.
614 * The PROM keeps various tracking bits in this memory area.
615 */
616 salr = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
617 (u64) SN_HWPERF_GET_HEAPSIZE, 0,
618 (u64) sizeof(u64), (u64) &v, 0, 0, NULL);
619 if (salr != SN_HWPERF_OP_OK) {
620 e = -EINVAL;
621 goto out;
622 }
623
624 if ((sn_hwperf_salheap = vmalloc(v)) == NULL) {
625 e = -ENOMEM;
626 goto out;
627 }
628 salr = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
629 SN_HWPERF_INSTALL_HEAP, 0, v,
630 (u64) sn_hwperf_salheap, 0, 0, NULL);
631 if (salr != SN_HWPERF_OP_OK) {
632 e = -EINVAL;
633 goto out;
634 }
635
636 salr = ia64_sn_hwperf_op(sn_hwperf_master_nasid,
637 SN_HWPERF_OBJECT_COUNT, 0,
638 sizeof(u64), (u64) &v, 0, 0, NULL);
639 if (salr != SN_HWPERF_OP_OK) {
640 e = -EINVAL;
641 goto out;
642 }
643 sn_hwperf_obj_cnt = (int)v;
644
645out:
646 if (e < 0 && sn_hwperf_salheap) {
647 vfree(sn_hwperf_salheap);
648 sn_hwperf_salheap = NULL;
649 sn_hwperf_obj_cnt = 0;
650 }
651
652 if (!e) {
653 /*
654 * Register a dynamic misc device for ioctl. Platforms
655 * supporting hotplug will create /dev/sn_hwperf, else
656 * user can to look up the minor number in /proc/misc.
657 */
658 if ((e = misc_register(&sn_hwperf_dev)) != 0) {
659 printk(KERN_ERR "sn_hwperf_init: misc register "
660 "for \"sn_hwperf\" failed, err %d\n", e);
661 }
662 }
663
664 up(&sn_hwperf_init_mutex);
665 return e;
666}
667
668int sn_topology_open(struct inode *inode, struct file *file)
669{
670 int e;
671 struct seq_file *seq;
672 struct sn_hwperf_object_info *objbuf;
673 int nobj;
674
675 if ((e = sn_hwperf_enum_objects(&nobj, &objbuf)) == 0) {
676 e = seq_open(file, &sn_topology_seq_ops);
677 seq = file->private_data;
678 seq->private = objbuf;
679 }
680
681 return e;
682}
683
684int sn_topology_release(struct inode *inode, struct file *file)
685{
686 struct seq_file *seq = file->private_data;
687
688 vfree(seq->private);
689 return seq_release(inode, file);
690}
diff --git a/arch/ia64/sn/kernel/sn2/sn_proc_fs.c b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
new file mode 100644
index 000000000000..6a80fca807b9
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/sn_proc_fs.c
@@ -0,0 +1,149 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000-2004 Silicon Graphics, Inc. All rights reserved.
7 */
8#include <linux/config.h>
9#include <asm/uaccess.h>
10
11#ifdef CONFIG_PROC_FS
12#include <linux/proc_fs.h>
13#include <linux/seq_file.h>
14#include <asm/sn/sn_sal.h>
15
16static int partition_id_show(struct seq_file *s, void *p)
17{
18 seq_printf(s, "%d\n", sn_local_partid());
19 return 0;
20}
21
22static int partition_id_open(struct inode *inode, struct file *file)
23{
24 return single_open(file, partition_id_show, NULL);
25}
26
27static int system_serial_number_show(struct seq_file *s, void *p)
28{
29 seq_printf(s, "%s\n", sn_system_serial_number());
30 return 0;
31}
32
33static int system_serial_number_open(struct inode *inode, struct file *file)
34{
35 return single_open(file, system_serial_number_show, NULL);
36}
37
38static int licenseID_show(struct seq_file *s, void *p)
39{
40 seq_printf(s, "0x%lx\n", sn_partition_serial_number_val());
41 return 0;
42}
43
44static int licenseID_open(struct inode *inode, struct file *file)
45{
46 return single_open(file, licenseID_show, NULL);
47}
48
49/*
50 * Enable forced interrupt by default.
51 * When set, the sn interrupt handler writes the force interrupt register on
52 * the bridge chip. The hardware will then send an interrupt message if the
53 * interrupt line is active. This mimics a level sensitive interrupt.
54 */
55int sn_force_interrupt_flag = 1;
56
57static int sn_force_interrupt_show(struct seq_file *s, void *p)
58{
59 seq_printf(s, "Force interrupt is %s\n",
60 sn_force_interrupt_flag ? "enabled" : "disabled");
61 return 0;
62}
63
64static ssize_t sn_force_interrupt_write_proc(struct file *file,
65 const char __user *buffer, size_t count, loff_t *data)
66{
67 char val;
68
69 if (copy_from_user(&val, buffer, 1))
70 return -EFAULT;
71
72 sn_force_interrupt_flag = (val == '0') ? 0 : 1;
73 return count;
74}
75
76static int sn_force_interrupt_open(struct inode *inode, struct file *file)
77{
78 return single_open(file, sn_force_interrupt_show, NULL);
79}
80
81static int coherence_id_show(struct seq_file *s, void *p)
82{
83 seq_printf(s, "%d\n", partition_coherence_id());
84
85 return 0;
86}
87
88static int coherence_id_open(struct inode *inode, struct file *file)
89{
90 return single_open(file, coherence_id_show, NULL);
91}
92
93static struct proc_dir_entry *sn_procfs_create_entry(
94 const char *name, struct proc_dir_entry *parent,
95 int (*openfunc)(struct inode *, struct file *),
96 int (*releasefunc)(struct inode *, struct file *))
97{
98 struct proc_dir_entry *e = create_proc_entry(name, 0444, parent);
99
100 if (e) {
101 e->proc_fops = (struct file_operations *)kmalloc(
102 sizeof(struct file_operations), GFP_KERNEL);
103 if (e->proc_fops) {
104 memset(e->proc_fops, 0, sizeof(struct file_operations));
105 e->proc_fops->open = openfunc;
106 e->proc_fops->read = seq_read;
107 e->proc_fops->llseek = seq_lseek;
108 e->proc_fops->release = releasefunc;
109 }
110 }
111
112 return e;
113}
114
115/* /proc/sgi_sn/sn_topology uses seq_file, see sn_hwperf.c */
116extern int sn_topology_open(struct inode *, struct file *);
117extern int sn_topology_release(struct inode *, struct file *);
118
119void register_sn_procfs(void)
120{
121 static struct proc_dir_entry *sgi_proc_dir = NULL;
122 struct proc_dir_entry *e;
123
124 BUG_ON(sgi_proc_dir != NULL);
125 if (!(sgi_proc_dir = proc_mkdir("sgi_sn", NULL)))
126 return;
127
128 sn_procfs_create_entry("partition_id", sgi_proc_dir,
129 partition_id_open, single_release);
130
131 sn_procfs_create_entry("system_serial_number", sgi_proc_dir,
132 system_serial_number_open, single_release);
133
134 sn_procfs_create_entry("licenseID", sgi_proc_dir,
135 licenseID_open, single_release);
136
137 e = sn_procfs_create_entry("sn_force_interrupt", sgi_proc_dir,
138 sn_force_interrupt_open, single_release);
139 if (e)
140 e->proc_fops->write = sn_force_interrupt_write_proc;
141
142 sn_procfs_create_entry("coherence_id", sgi_proc_dir,
143 coherence_id_open, single_release);
144
145 sn_procfs_create_entry("sn_topology", sgi_proc_dir,
146 sn_topology_open, sn_topology_release);
147}
148
149#endif /* CONFIG_PROC_FS */
diff --git a/arch/ia64/sn/kernel/sn2/timer.c b/arch/ia64/sn/kernel/sn2/timer.c
new file mode 100644
index 000000000000..deb9baf4d473
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/timer.c
@@ -0,0 +1,36 @@
1/*
2 * linux/arch/ia64/sn/kernel/sn2/timer.c
3 *
4 * Copyright (C) 2003 Silicon Graphics, Inc.
5 * Copyright (C) 2003 Hewlett-Packard Co
6 * David Mosberger <davidm@hpl.hp.com>: updated for new timer-interpolation infrastructure
7 */
8
9#include <linux/init.h>
10#include <linux/kernel.h>
11#include <linux/sched.h>
12#include <linux/time.h>
13#include <linux/interrupt.h>
14
15#include <asm/hw_irq.h>
16#include <asm/system.h>
17
18#include <asm/sn/leds.h>
19#include <asm/sn/shub_mmr.h>
20#include <asm/sn/clksupport.h>
21
22extern unsigned long sn_rtc_cycles_per_second;
23
24static struct time_interpolator sn2_interpolator = {
25 .drift = -1,
26 .shift = 10,
27 .mask = (1LL << 55) - 1,
28 .source = TIME_SOURCE_MMIO64
29};
30
31void __init sn_timer_init(void)
32{
33 sn2_interpolator.frequency = sn_rtc_cycles_per_second;
34 sn2_interpolator.addr = RTC_COUNTER_ADDR;
35 register_time_interpolator(&sn2_interpolator);
36}
diff --git a/arch/ia64/sn/kernel/sn2/timer_interrupt.c b/arch/ia64/sn/kernel/sn2/timer_interrupt.c
new file mode 100644
index 000000000000..cde7375390b0
--- /dev/null
+++ b/arch/ia64/sn/kernel/sn2/timer_interrupt.c
@@ -0,0 +1,63 @@
1/*
2 *
3 *
4 * Copyright (c) 2003 Silicon Graphics, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it would be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 *
14 * Further, this software is distributed without any warranty that it is
15 * free of the rightful claim of any third person regarding infringement
16 * or the like. Any license provided herein, whether implied or
17 * otherwise, applies only to this software file. Patent licenses, if
18 * any, provided herein do not apply to combinations of this program with
19 * other software, or any other product whatsoever.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this program; if not, write the Free Software
23 * Foundation, Inc., 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 *
25 * Contact information: Silicon Graphics, Inc., 1600 Amphitheatre Pkwy,
26 * Mountain View, CA 94043, or:
27 *
28 * http://www.sgi.com
29 *
30 * For further information regarding this notice, see:
31 *
32 * http://oss.sgi.com/projects/GenInfo/NoticeExplan
33 */
34
35#include <linux/interrupt.h>
36#include <asm/sn/pda.h>
37#include <asm/sn/leds.h>
38
39extern void sn_lb_int_war_check(void);
40extern irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs);
41
42#define SN_LB_INT_WAR_INTERVAL 100
43
44void sn_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
45{
46 /* LED blinking */
47 if (!pda->hb_count--) {
48 pda->hb_count = HZ / 2;
49 set_led_bits(pda->hb_state ^=
50 LED_CPU_HEARTBEAT, LED_CPU_HEARTBEAT);
51 }
52
53 if (enable_shub_wars_1_1()) {
54 /* Bugfix code for SHUB 1.1 */
55 if (pda->pio_shub_war_cam_addr)
56 *pda->pio_shub_war_cam_addr = 0x8000000000000010UL;
57 }
58 if (pda->sn_lb_int_war_ticks == 0)
59 sn_lb_int_war_check();
60 pda->sn_lb_int_war_ticks++;
61 if (pda->sn_lb_int_war_ticks >= SN_LB_INT_WAR_INTERVAL)
62 pda->sn_lb_int_war_ticks = 0;
63}
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-22 11:13:47 -0400