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authorIngo Molnar <mingo@elte.hu>2009-01-18 14:15:05 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-18 14:15:05 -0500
commit4092762aebfe55c1f8e31440b80a053c2dbe519b (patch)
tree8fb9fd14131194174c12daf5d8195afd3b62bc3e /arch/ia64/pci/pci.c
parent745b1626dd71ce9661a05ea4db57859ed5c773d2 (diff)
parent1de9e8e70f5acc441550ca75433563d91b269bbe (diff)
Merge branch 'tracing/ftrace'; commit 'v2.6.29-rc2' into tracing/core
Diffstat (limited to 'arch/ia64/pci/pci.c')
-rw-r--r--arch/ia64/pci/pci.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index 211fcfd115f9..61f1af5c23c1 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -19,6 +19,7 @@
19#include <linux/ioport.h> 19#include <linux/ioport.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/spinlock.h> 21#include <linux/spinlock.h>
22#include <linux/bootmem.h>
22 23
23#include <asm/machvec.h> 24#include <asm/machvec.h>
24#include <asm/page.h> 25#include <asm/page.h>
@@ -748,6 +749,32 @@ static void __init set_pci_cacheline_size(void)
748 pci_cache_line_size = (1 << cci.pcci_line_size) / 4; 749 pci_cache_line_size = (1 << cci.pcci_line_size) / 4;
749} 750}
750 751
752u64 ia64_dma_get_required_mask(struct device *dev)
753{
754 u32 low_totalram = ((max_pfn - 1) << PAGE_SHIFT);
755 u32 high_totalram = ((max_pfn - 1) >> (32 - PAGE_SHIFT));
756 u64 mask;
757
758 if (!high_totalram) {
759 /* convert to mask just covering totalram */
760 low_totalram = (1 << (fls(low_totalram) - 1));
761 low_totalram += low_totalram - 1;
762 mask = low_totalram;
763 } else {
764 high_totalram = (1 << (fls(high_totalram) - 1));
765 high_totalram += high_totalram - 1;
766 mask = (((u64)high_totalram) << 32) + 0xffffffff;
767 }
768 return mask;
769}
770EXPORT_SYMBOL_GPL(ia64_dma_get_required_mask);
771
772u64 dma_get_required_mask(struct device *dev)
773{
774 return platform_dma_get_required_mask(dev);
775}
776EXPORT_SYMBOL_GPL(dma_get_required_mask);
777
751static int __init pcibios_init(void) 778static int __init pcibios_init(void)
752{ 779{
753 set_pci_cacheline_size(); 780 set_pci_cacheline_size();