diff options
author | Tejun Heo <tj@kernel.org> | 2010-02-02 00:38:15 -0500 |
---|---|---|
committer | Tejun Heo <tj@kernel.org> | 2010-02-02 00:38:15 -0500 |
commit | ab386128f20c44c458a90039ab1bdc265ac474c9 (patch) | |
tree | 2ad188744922b1bb951fd10ff50dc04c83acce22 /arch/ia64/mm | |
parent | dbfc196a3cc1a2514ad0737a82f764de23bd65e6 (diff) | |
parent | ab658321f32770b903a4426e2a6fae0392757755 (diff) |
Merge branch 'master' into percpu
Diffstat (limited to 'arch/ia64/mm')
-rw-r--r-- | arch/ia64/mm/init.c | 2 | ||||
-rw-r--r-- | arch/ia64/mm/tlb.c | 32 |
2 files changed, 20 insertions, 14 deletions
diff --git a/arch/ia64/mm/init.c b/arch/ia64/mm/init.c index b9609c69343a..7c0d4814a68d 100644 --- a/arch/ia64/mm/init.c +++ b/arch/ia64/mm/init.c | |||
@@ -91,7 +91,7 @@ dma_mark_clean(void *addr, size_t size) | |||
91 | inline void | 91 | inline void |
92 | ia64_set_rbs_bot (void) | 92 | ia64_set_rbs_bot (void) |
93 | { | 93 | { |
94 | unsigned long stack_size = current->signal->rlim[RLIMIT_STACK].rlim_max & -16; | 94 | unsigned long stack_size = rlimit_max(RLIMIT_STACK) & -16; |
95 | 95 | ||
96 | if (stack_size > MAX_USER_STACK_SIZE) | 96 | if (stack_size > MAX_USER_STACK_SIZE) |
97 | stack_size = MAX_USER_STACK_SIZE; | 97 | stack_size = MAX_USER_STACK_SIZE; |
diff --git a/arch/ia64/mm/tlb.c b/arch/ia64/mm/tlb.c index ee09d261f2e6..f3de9d7a98b4 100644 --- a/arch/ia64/mm/tlb.c +++ b/arch/ia64/mm/tlb.c | |||
@@ -48,7 +48,7 @@ DEFINE_PER_CPU(u8, ia64_need_tlb_flush); | |||
48 | DEFINE_PER_CPU(u8, ia64_tr_num); /*Number of TR slots in current processor*/ | 48 | DEFINE_PER_CPU(u8, ia64_tr_num); /*Number of TR slots in current processor*/ |
49 | DEFINE_PER_CPU(u8, ia64_tr_used); /*Max Slot number used by kernel*/ | 49 | DEFINE_PER_CPU(u8, ia64_tr_used); /*Max Slot number used by kernel*/ |
50 | 50 | ||
51 | struct ia64_tr_entry __per_cpu_idtrs[NR_CPUS][2][IA64_TR_ALLOC_MAX]; | 51 | struct ia64_tr_entry *ia64_idtrs[NR_CPUS]; |
52 | 52 | ||
53 | /* | 53 | /* |
54 | * Initializes the ia64_ctx.bitmap array based on max_ctx+1. | 54 | * Initializes the ia64_ctx.bitmap array based on max_ctx+1. |
@@ -429,10 +429,16 @@ int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) | |||
429 | struct ia64_tr_entry *p; | 429 | struct ia64_tr_entry *p; |
430 | int cpu = smp_processor_id(); | 430 | int cpu = smp_processor_id(); |
431 | 431 | ||
432 | if (!ia64_idtrs[cpu]) { | ||
433 | ia64_idtrs[cpu] = kmalloc(2 * IA64_TR_ALLOC_MAX * | ||
434 | sizeof (struct ia64_tr_entry), GFP_KERNEL); | ||
435 | if (!ia64_idtrs[cpu]) | ||
436 | return -ENOMEM; | ||
437 | } | ||
432 | r = -EINVAL; | 438 | r = -EINVAL; |
433 | /*Check overlap with existing TR entries*/ | 439 | /*Check overlap with existing TR entries*/ |
434 | if (target_mask & 0x1) { | 440 | if (target_mask & 0x1) { |
435 | p = &__per_cpu_idtrs[cpu][0][0]; | 441 | p = ia64_idtrs[cpu]; |
436 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); | 442 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); |
437 | i++, p++) { | 443 | i++, p++) { |
438 | if (p->pte & 0x1) | 444 | if (p->pte & 0x1) |
@@ -444,7 +450,7 @@ int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) | |||
444 | } | 450 | } |
445 | } | 451 | } |
446 | if (target_mask & 0x2) { | 452 | if (target_mask & 0x2) { |
447 | p = &__per_cpu_idtrs[cpu][1][0]; | 453 | p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX; |
448 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); | 454 | for (i = IA64_TR_ALLOC_BASE; i <= per_cpu(ia64_tr_used, cpu); |
449 | i++, p++) { | 455 | i++, p++) { |
450 | if (p->pte & 0x1) | 456 | if (p->pte & 0x1) |
@@ -459,16 +465,16 @@ int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size) | |||
459 | for (i = IA64_TR_ALLOC_BASE; i < per_cpu(ia64_tr_num, cpu); i++) { | 465 | for (i = IA64_TR_ALLOC_BASE; i < per_cpu(ia64_tr_num, cpu); i++) { |
460 | switch (target_mask & 0x3) { | 466 | switch (target_mask & 0x3) { |
461 | case 1: | 467 | case 1: |
462 | if (!(__per_cpu_idtrs[cpu][0][i].pte & 0x1)) | 468 | if (!((ia64_idtrs[cpu] + i)->pte & 0x1)) |
463 | goto found; | 469 | goto found; |
464 | continue; | 470 | continue; |
465 | case 2: | 471 | case 2: |
466 | if (!(__per_cpu_idtrs[cpu][1][i].pte & 0x1)) | 472 | if (!((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) |
467 | goto found; | 473 | goto found; |
468 | continue; | 474 | continue; |
469 | case 3: | 475 | case 3: |
470 | if (!(__per_cpu_idtrs[cpu][0][i].pte & 0x1) && | 476 | if (!((ia64_idtrs[cpu] + i)->pte & 0x1) && |
471 | !(__per_cpu_idtrs[cpu][1][i].pte & 0x1)) | 477 | !((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) |
472 | goto found; | 478 | goto found; |
473 | continue; | 479 | continue; |
474 | default: | 480 | default: |
@@ -488,7 +494,7 @@ found: | |||
488 | if (target_mask & 0x1) { | 494 | if (target_mask & 0x1) { |
489 | ia64_itr(0x1, i, va, pte, log_size); | 495 | ia64_itr(0x1, i, va, pte, log_size); |
490 | ia64_srlz_i(); | 496 | ia64_srlz_i(); |
491 | p = &__per_cpu_idtrs[cpu][0][i]; | 497 | p = ia64_idtrs[cpu] + i; |
492 | p->ifa = va; | 498 | p->ifa = va; |
493 | p->pte = pte; | 499 | p->pte = pte; |
494 | p->itir = log_size << 2; | 500 | p->itir = log_size << 2; |
@@ -497,7 +503,7 @@ found: | |||
497 | if (target_mask & 0x2) { | 503 | if (target_mask & 0x2) { |
498 | ia64_itr(0x2, i, va, pte, log_size); | 504 | ia64_itr(0x2, i, va, pte, log_size); |
499 | ia64_srlz_i(); | 505 | ia64_srlz_i(); |
500 | p = &__per_cpu_idtrs[cpu][1][i]; | 506 | p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i; |
501 | p->ifa = va; | 507 | p->ifa = va; |
502 | p->pte = pte; | 508 | p->pte = pte; |
503 | p->itir = log_size << 2; | 509 | p->itir = log_size << 2; |
@@ -528,7 +534,7 @@ void ia64_ptr_entry(u64 target_mask, int slot) | |||
528 | return; | 534 | return; |
529 | 535 | ||
530 | if (target_mask & 0x1) { | 536 | if (target_mask & 0x1) { |
531 | p = &__per_cpu_idtrs[cpu][0][slot]; | 537 | p = ia64_idtrs[cpu] + slot; |
532 | if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { | 538 | if ((p->pte&0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { |
533 | p->pte = 0; | 539 | p->pte = 0; |
534 | ia64_ptr(0x1, p->ifa, p->itir>>2); | 540 | ia64_ptr(0x1, p->ifa, p->itir>>2); |
@@ -537,7 +543,7 @@ void ia64_ptr_entry(u64 target_mask, int slot) | |||
537 | } | 543 | } |
538 | 544 | ||
539 | if (target_mask & 0x2) { | 545 | if (target_mask & 0x2) { |
540 | p = &__per_cpu_idtrs[cpu][1][slot]; | 546 | p = ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + slot; |
541 | if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { | 547 | if ((p->pte & 0x1) && is_tr_overlap(p, p->ifa, p->itir>>2)) { |
542 | p->pte = 0; | 548 | p->pte = 0; |
543 | ia64_ptr(0x2, p->ifa, p->itir>>2); | 549 | ia64_ptr(0x2, p->ifa, p->itir>>2); |
@@ -546,8 +552,8 @@ void ia64_ptr_entry(u64 target_mask, int slot) | |||
546 | } | 552 | } |
547 | 553 | ||
548 | for (i = per_cpu(ia64_tr_used, cpu); i >= IA64_TR_ALLOC_BASE; i--) { | 554 | for (i = per_cpu(ia64_tr_used, cpu); i >= IA64_TR_ALLOC_BASE; i--) { |
549 | if ((__per_cpu_idtrs[cpu][0][i].pte & 0x1) || | 555 | if (((ia64_idtrs[cpu] + i)->pte & 0x1) || |
550 | (__per_cpu_idtrs[cpu][1][i].pte & 0x1)) | 556 | ((ia64_idtrs[cpu] + IA64_TR_ALLOC_MAX + i)->pte & 0x1)) |
551 | break; | 557 | break; |
552 | } | 558 | } |
553 | per_cpu(ia64_tr_used, cpu) = i; | 559 | per_cpu(ia64_tr_used, cpu) = i; |