diff options
author | John W. Linville <linville@tuxdriver.com> | 2005-09-29 17:42:42 -0400 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2005-09-29 17:42:42 -0400 |
commit | 6c654b5fdf093cd05f35f7c9c2a00182fa5636dc (patch) | |
tree | 7aa16a41d64b906c6e7e5248897f88027428d12a /arch/ia64/lib | |
parent | 0b9afede3d9c66fef06f1d5ef5ff15c4b97730fc (diff) |
[PATCH] swiotlb: move from arch/ia64/lib/ to lib/
The swiotlb implementation is shared by both IA-64 and EM64T. However,
the source itself lives under arch/ia64. This patch moves swiotlb.c
from arch/ia64/lib to lib/ and fixes-up the appropriate Makefile and
Kconfig files. No actual changes are made to swiotlb.c.
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/lib')
-rw-r--r-- | arch/ia64/lib/Makefile | 2 | ||||
-rw-r--r-- | arch/ia64/lib/swiotlb.c | 759 |
2 files changed, 1 insertions, 760 deletions
diff --git a/arch/ia64/lib/Makefile b/arch/ia64/lib/Makefile index 799407e7726f..4be1546e1726 100644 --- a/arch/ia64/lib/Makefile +++ b/arch/ia64/lib/Makefile | |||
@@ -9,7 +9,7 @@ lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \ | |||
9 | bitop.o checksum.o clear_page.o csum_partial_copy.o \ | 9 | bitop.o checksum.o clear_page.o csum_partial_copy.o \ |
10 | clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \ | 10 | clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \ |
11 | flush.o ip_fast_csum.o do_csum.o \ | 11 | flush.o ip_fast_csum.o do_csum.o \ |
12 | memset.o strlen.o swiotlb.o | 12 | memset.o strlen.o |
13 | 13 | ||
14 | lib-$(CONFIG_ITANIUM) += copy_page.o copy_user.o memcpy.o | 14 | lib-$(CONFIG_ITANIUM) += copy_page.o copy_user.o memcpy.o |
15 | lib-$(CONFIG_MCKINLEY) += copy_page_mck.o memcpy_mck.o | 15 | lib-$(CONFIG_MCKINLEY) += copy_page_mck.o memcpy_mck.o |
diff --git a/arch/ia64/lib/swiotlb.c b/arch/ia64/lib/swiotlb.c deleted file mode 100644 index 875b0c16250c..000000000000 --- a/arch/ia64/lib/swiotlb.c +++ /dev/null | |||
@@ -1,759 +0,0 @@ | |||
1 | /* | ||
2 | * Dynamic DMA mapping support. | ||
3 | * | ||
4 | * This implementation is for IA-64 platforms that do not support | ||
5 | * I/O TLBs (aka DMA address translation hardware). | ||
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | ||
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | ||
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | ||
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | ||
10 | * | ||
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | ||
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | ||
13 | * unnecessary i-cache flushing. | ||
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. | ||
15 | */ | ||
16 | |||
17 | #include <linux/cache.h> | ||
18 | #include <linux/mm.h> | ||
19 | #include <linux/module.h> | ||
20 | #include <linux/pci.h> | ||
21 | #include <linux/spinlock.h> | ||
22 | #include <linux/string.h> | ||
23 | #include <linux/types.h> | ||
24 | #include <linux/ctype.h> | ||
25 | |||
26 | #include <asm/io.h> | ||
27 | #include <asm/pci.h> | ||
28 | #include <asm/dma.h> | ||
29 | |||
30 | #include <linux/init.h> | ||
31 | #include <linux/bootmem.h> | ||
32 | |||
33 | #define OFFSET(val,align) ((unsigned long) \ | ||
34 | ( (val) & ( (align) - 1))) | ||
35 | |||
36 | #define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset) | ||
37 | #define SG_ENT_PHYS_ADDRESS(SG) virt_to_phys(SG_ENT_VIRT_ADDRESS(SG)) | ||
38 | |||
39 | /* | ||
40 | * Maximum allowable number of contiguous slabs to map, | ||
41 | * must be a power of 2. What is the appropriate value ? | ||
42 | * The complexity of {map,unmap}_single is linearly dependent on this value. | ||
43 | */ | ||
44 | #define IO_TLB_SEGSIZE 128 | ||
45 | |||
46 | /* | ||
47 | * log of the size of each IO TLB slab. The number of slabs is command line | ||
48 | * controllable. | ||
49 | */ | ||
50 | #define IO_TLB_SHIFT 11 | ||
51 | |||
52 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) | ||
53 | |||
54 | /* | ||
55 | * Minimum IO TLB size to bother booting with. Systems with mainly | ||
56 | * 64bit capable cards will only lightly use the swiotlb. If we can't | ||
57 | * allocate a contiguous 1MB, we're probably in trouble anyway. | ||
58 | */ | ||
59 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | ||
60 | |||
61 | int swiotlb_force; | ||
62 | |||
63 | /* | ||
64 | * Used to do a quick range check in swiotlb_unmap_single and | ||
65 | * swiotlb_sync_single_*, to see if the memory was in fact allocated by this | ||
66 | * API. | ||
67 | */ | ||
68 | static char *io_tlb_start, *io_tlb_end; | ||
69 | |||
70 | /* | ||
71 | * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and | ||
72 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. | ||
73 | */ | ||
74 | static unsigned long io_tlb_nslabs; | ||
75 | |||
76 | /* | ||
77 | * When the IOMMU overflows we return a fallback buffer. This sets the size. | ||
78 | */ | ||
79 | static unsigned long io_tlb_overflow = 32*1024; | ||
80 | |||
81 | void *io_tlb_overflow_buffer; | ||
82 | |||
83 | /* | ||
84 | * This is a free list describing the number of free entries available from | ||
85 | * each index | ||
86 | */ | ||
87 | static unsigned int *io_tlb_list; | ||
88 | static unsigned int io_tlb_index; | ||
89 | |||
90 | /* | ||
91 | * We need to save away the original address corresponding to a mapped entry | ||
92 | * for the sync operations. | ||
93 | */ | ||
94 | static unsigned char **io_tlb_orig_addr; | ||
95 | |||
96 | /* | ||
97 | * Protect the above data structures in the map and unmap calls | ||
98 | */ | ||
99 | static DEFINE_SPINLOCK(io_tlb_lock); | ||
100 | |||
101 | static int __init | ||
102 | setup_io_tlb_npages(char *str) | ||
103 | { | ||
104 | if (isdigit(*str)) { | ||
105 | io_tlb_nslabs = simple_strtoul(str, &str, 0); | ||
106 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ | ||
107 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | ||
108 | } | ||
109 | if (*str == ',') | ||
110 | ++str; | ||
111 | if (!strcmp(str, "force")) | ||
112 | swiotlb_force = 1; | ||
113 | return 1; | ||
114 | } | ||
115 | __setup("swiotlb=", setup_io_tlb_npages); | ||
116 | /* make io_tlb_overflow tunable too? */ | ||
117 | |||
118 | /* | ||
119 | * Statically reserve bounce buffer space and initialize bounce buffer data | ||
120 | * structures for the software IO TLB used to implement the PCI DMA API. | ||
121 | */ | ||
122 | void | ||
123 | swiotlb_init_with_default_size (size_t default_size) | ||
124 | { | ||
125 | unsigned long i; | ||
126 | |||
127 | if (!io_tlb_nslabs) { | ||
128 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | ||
129 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | ||
130 | } | ||
131 | |||
132 | /* | ||
133 | * Get IO TLB memory from the low pages | ||
134 | */ | ||
135 | io_tlb_start = alloc_bootmem_low_pages(io_tlb_nslabs * | ||
136 | (1 << IO_TLB_SHIFT)); | ||
137 | if (!io_tlb_start) | ||
138 | panic("Cannot allocate SWIOTLB buffer"); | ||
139 | io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT); | ||
140 | |||
141 | /* | ||
142 | * Allocate and initialize the free list array. This array is used | ||
143 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | ||
144 | * between io_tlb_start and io_tlb_end. | ||
145 | */ | ||
146 | io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int)); | ||
147 | for (i = 0; i < io_tlb_nslabs; i++) | ||
148 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | ||
149 | io_tlb_index = 0; | ||
150 | io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *)); | ||
151 | |||
152 | /* | ||
153 | * Get the overflow emergency buffer | ||
154 | */ | ||
155 | io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow); | ||
156 | printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n", | ||
157 | virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end)); | ||
158 | } | ||
159 | |||
160 | void | ||
161 | swiotlb_init (void) | ||
162 | { | ||
163 | swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */ | ||
164 | } | ||
165 | |||
166 | /* | ||
167 | * Systems with larger DMA zones (those that don't support ISA) can | ||
168 | * initialize the swiotlb later using the slab allocator if needed. | ||
169 | * This should be just like above, but with some error catching. | ||
170 | */ | ||
171 | int | ||
172 | swiotlb_late_init_with_default_size (size_t default_size) | ||
173 | { | ||
174 | unsigned long i, req_nslabs = io_tlb_nslabs; | ||
175 | unsigned int order; | ||
176 | |||
177 | if (!io_tlb_nslabs) { | ||
178 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | ||
179 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | ||
180 | } | ||
181 | |||
182 | /* | ||
183 | * Get IO TLB memory from the low pages | ||
184 | */ | ||
185 | order = get_order(io_tlb_nslabs * (1 << IO_TLB_SHIFT)); | ||
186 | io_tlb_nslabs = SLABS_PER_PAGE << order; | ||
187 | |||
188 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | ||
189 | io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN, | ||
190 | order); | ||
191 | if (io_tlb_start) | ||
192 | break; | ||
193 | order--; | ||
194 | } | ||
195 | |||
196 | if (!io_tlb_start) | ||
197 | goto cleanup1; | ||
198 | |||
199 | if (order != get_order(io_tlb_nslabs * (1 << IO_TLB_SHIFT))) { | ||
200 | printk(KERN_WARNING "Warning: only able to allocate %ld MB " | ||
201 | "for software IO TLB\n", (PAGE_SIZE << order) >> 20); | ||
202 | io_tlb_nslabs = SLABS_PER_PAGE << order; | ||
203 | } | ||
204 | io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT); | ||
205 | memset(io_tlb_start, 0, io_tlb_nslabs * (1 << IO_TLB_SHIFT)); | ||
206 | |||
207 | /* | ||
208 | * Allocate and initialize the free list array. This array is used | ||
209 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | ||
210 | * between io_tlb_start and io_tlb_end. | ||
211 | */ | ||
212 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | ||
213 | get_order(io_tlb_nslabs * sizeof(int))); | ||
214 | if (!io_tlb_list) | ||
215 | goto cleanup2; | ||
216 | |||
217 | for (i = 0; i < io_tlb_nslabs; i++) | ||
218 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | ||
219 | io_tlb_index = 0; | ||
220 | |||
221 | io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL, | ||
222 | get_order(io_tlb_nslabs * sizeof(char *))); | ||
223 | if (!io_tlb_orig_addr) | ||
224 | goto cleanup3; | ||
225 | |||
226 | memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *)); | ||
227 | |||
228 | /* | ||
229 | * Get the overflow emergency buffer | ||
230 | */ | ||
231 | io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA, | ||
232 | get_order(io_tlb_overflow)); | ||
233 | if (!io_tlb_overflow_buffer) | ||
234 | goto cleanup4; | ||
235 | |||
236 | printk(KERN_INFO "Placing %ldMB software IO TLB between 0x%lx - " | ||
237 | "0x%lx\n", (io_tlb_nslabs * (1 << IO_TLB_SHIFT)) >> 20, | ||
238 | virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end)); | ||
239 | |||
240 | return 0; | ||
241 | |||
242 | cleanup4: | ||
243 | free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs * | ||
244 | sizeof(char *))); | ||
245 | io_tlb_orig_addr = NULL; | ||
246 | cleanup3: | ||
247 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | ||
248 | sizeof(int))); | ||
249 | io_tlb_list = NULL; | ||
250 | io_tlb_end = NULL; | ||
251 | cleanup2: | ||
252 | free_pages((unsigned long)io_tlb_start, order); | ||
253 | io_tlb_start = NULL; | ||
254 | cleanup1: | ||
255 | io_tlb_nslabs = req_nslabs; | ||
256 | return -ENOMEM; | ||
257 | } | ||
258 | |||
259 | static inline int | ||
260 | address_needs_mapping(struct device *hwdev, dma_addr_t addr) | ||
261 | { | ||
262 | dma_addr_t mask = 0xffffffff; | ||
263 | /* If the device has a mask, use it, otherwise default to 32 bits */ | ||
264 | if (hwdev && hwdev->dma_mask) | ||
265 | mask = *hwdev->dma_mask; | ||
266 | return (addr & ~mask) != 0; | ||
267 | } | ||
268 | |||
269 | /* | ||
270 | * Allocates bounce buffer and returns its kernel virtual address. | ||
271 | */ | ||
272 | static void * | ||
273 | map_single(struct device *hwdev, char *buffer, size_t size, int dir) | ||
274 | { | ||
275 | unsigned long flags; | ||
276 | char *dma_addr; | ||
277 | unsigned int nslots, stride, index, wrap; | ||
278 | int i; | ||
279 | |||
280 | /* | ||
281 | * For mappings greater than a page, we limit the stride (and | ||
282 | * hence alignment) to a page size. | ||
283 | */ | ||
284 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | ||
285 | if (size > PAGE_SIZE) | ||
286 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); | ||
287 | else | ||
288 | stride = 1; | ||
289 | |||
290 | if (!nslots) | ||
291 | BUG(); | ||
292 | |||
293 | /* | ||
294 | * Find suitable number of IO TLB entries size that will fit this | ||
295 | * request and allocate a buffer from that IO TLB pool. | ||
296 | */ | ||
297 | spin_lock_irqsave(&io_tlb_lock, flags); | ||
298 | { | ||
299 | wrap = index = ALIGN(io_tlb_index, stride); | ||
300 | |||
301 | if (index >= io_tlb_nslabs) | ||
302 | wrap = index = 0; | ||
303 | |||
304 | do { | ||
305 | /* | ||
306 | * If we find a slot that indicates we have 'nslots' | ||
307 | * number of contiguous buffers, we allocate the | ||
308 | * buffers from that slot and mark the entries as '0' | ||
309 | * indicating unavailable. | ||
310 | */ | ||
311 | if (io_tlb_list[index] >= nslots) { | ||
312 | int count = 0; | ||
313 | |||
314 | for (i = index; i < (int) (index + nslots); i++) | ||
315 | io_tlb_list[i] = 0; | ||
316 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | ||
317 | io_tlb_list[i] = ++count; | ||
318 | dma_addr = io_tlb_start + (index << IO_TLB_SHIFT); | ||
319 | |||
320 | /* | ||
321 | * Update the indices to avoid searching in | ||
322 | * the next round. | ||
323 | */ | ||
324 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | ||
325 | ? (index + nslots) : 0); | ||
326 | |||
327 | goto found; | ||
328 | } | ||
329 | index += stride; | ||
330 | if (index >= io_tlb_nslabs) | ||
331 | index = 0; | ||
332 | } while (index != wrap); | ||
333 | |||
334 | spin_unlock_irqrestore(&io_tlb_lock, flags); | ||
335 | return NULL; | ||
336 | } | ||
337 | found: | ||
338 | spin_unlock_irqrestore(&io_tlb_lock, flags); | ||
339 | |||
340 | /* | ||
341 | * Save away the mapping from the original address to the DMA address. | ||
342 | * This is needed when we sync the memory. Then we sync the buffer if | ||
343 | * needed. | ||
344 | */ | ||
345 | io_tlb_orig_addr[index] = buffer; | ||
346 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) | ||
347 | memcpy(dma_addr, buffer, size); | ||
348 | |||
349 | return dma_addr; | ||
350 | } | ||
351 | |||
352 | /* | ||
353 | * dma_addr is the kernel virtual address of the bounce buffer to unmap. | ||
354 | */ | ||
355 | static void | ||
356 | unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | ||
357 | { | ||
358 | unsigned long flags; | ||
359 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | ||
360 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | ||
361 | char *buffer = io_tlb_orig_addr[index]; | ||
362 | |||
363 | /* | ||
364 | * First, sync the memory before unmapping the entry | ||
365 | */ | ||
366 | if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) | ||
367 | /* | ||
368 | * bounce... copy the data back into the original buffer * and | ||
369 | * delete the bounce buffer. | ||
370 | */ | ||
371 | memcpy(buffer, dma_addr, size); | ||
372 | |||
373 | /* | ||
374 | * Return the buffer to the free list by setting the corresponding | ||
375 | * entries to indicate the number of contigous entries available. | ||
376 | * While returning the entries to the free list, we merge the entries | ||
377 | * with slots below and above the pool being returned. | ||
378 | */ | ||
379 | spin_lock_irqsave(&io_tlb_lock, flags); | ||
380 | { | ||
381 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | ||
382 | io_tlb_list[index + nslots] : 0); | ||
383 | /* | ||
384 | * Step 1: return the slots to the free list, merging the | ||
385 | * slots with superceeding slots | ||
386 | */ | ||
387 | for (i = index + nslots - 1; i >= index; i--) | ||
388 | io_tlb_list[i] = ++count; | ||
389 | /* | ||
390 | * Step 2: merge the returned slots with the preceding slots, | ||
391 | * if available (non zero) | ||
392 | */ | ||
393 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | ||
394 | io_tlb_list[i] = ++count; | ||
395 | } | ||
396 | spin_unlock_irqrestore(&io_tlb_lock, flags); | ||
397 | } | ||
398 | |||
399 | static void | ||
400 | sync_single(struct device *hwdev, char *dma_addr, size_t size, int dir) | ||
401 | { | ||
402 | int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT; | ||
403 | char *buffer = io_tlb_orig_addr[index]; | ||
404 | |||
405 | /* | ||
406 | * bounce... copy the data back into/from the original buffer | ||
407 | * XXX How do you handle DMA_BIDIRECTIONAL here ? | ||
408 | */ | ||
409 | if (dir == DMA_FROM_DEVICE) | ||
410 | memcpy(buffer, dma_addr, size); | ||
411 | else if (dir == DMA_TO_DEVICE) | ||
412 | memcpy(dma_addr, buffer, size); | ||
413 | else | ||
414 | BUG(); | ||
415 | } | ||
416 | |||
417 | void * | ||
418 | swiotlb_alloc_coherent(struct device *hwdev, size_t size, | ||
419 | dma_addr_t *dma_handle, int flags) | ||
420 | { | ||
421 | unsigned long dev_addr; | ||
422 | void *ret; | ||
423 | int order = get_order(size); | ||
424 | |||
425 | /* | ||
426 | * XXX fix me: the DMA API should pass us an explicit DMA mask | ||
427 | * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32 | ||
428 | * bit range instead of a 16MB one). | ||
429 | */ | ||
430 | flags |= GFP_DMA; | ||
431 | |||
432 | ret = (void *)__get_free_pages(flags, order); | ||
433 | if (ret && address_needs_mapping(hwdev, virt_to_phys(ret))) { | ||
434 | /* | ||
435 | * The allocated memory isn't reachable by the device. | ||
436 | * Fall back on swiotlb_map_single(). | ||
437 | */ | ||
438 | free_pages((unsigned long) ret, order); | ||
439 | ret = NULL; | ||
440 | } | ||
441 | if (!ret) { | ||
442 | /* | ||
443 | * We are either out of memory or the device can't DMA | ||
444 | * to GFP_DMA memory; fall back on | ||
445 | * swiotlb_map_single(), which will grab memory from | ||
446 | * the lowest available address range. | ||
447 | */ | ||
448 | dma_addr_t handle; | ||
449 | handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE); | ||
450 | if (dma_mapping_error(handle)) | ||
451 | return NULL; | ||
452 | |||
453 | ret = phys_to_virt(handle); | ||
454 | } | ||
455 | |||
456 | memset(ret, 0, size); | ||
457 | dev_addr = virt_to_phys(ret); | ||
458 | |||
459 | /* Confirm address can be DMA'd by device */ | ||
460 | if (address_needs_mapping(hwdev, dev_addr)) { | ||
461 | printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016lx\n", | ||
462 | (unsigned long long)*hwdev->dma_mask, dev_addr); | ||
463 | panic("swiotlb_alloc_coherent: allocated memory is out of " | ||
464 | "range for device"); | ||
465 | } | ||
466 | *dma_handle = dev_addr; | ||
467 | return ret; | ||
468 | } | ||
469 | |||
470 | void | ||
471 | swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr, | ||
472 | dma_addr_t dma_handle) | ||
473 | { | ||
474 | if (!(vaddr >= (void *)io_tlb_start | ||
475 | && vaddr < (void *)io_tlb_end)) | ||
476 | free_pages((unsigned long) vaddr, get_order(size)); | ||
477 | else | ||
478 | /* DMA_TO_DEVICE to avoid memcpy in unmap_single */ | ||
479 | swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE); | ||
480 | } | ||
481 | |||
482 | static void | ||
483 | swiotlb_full(struct device *dev, size_t size, int dir, int do_panic) | ||
484 | { | ||
485 | /* | ||
486 | * Ran out of IOMMU space for this operation. This is very bad. | ||
487 | * Unfortunately the drivers cannot handle this operation properly. | ||
488 | * unless they check for pci_dma_mapping_error (most don't) | ||
489 | * When the mapping is small enough return a static buffer to limit | ||
490 | * the damage, or panic when the transfer is too big. | ||
491 | */ | ||
492 | printk(KERN_ERR "PCI-DMA: Out of SW-IOMMU space for %lu bytes at " | ||
493 | "device %s\n", size, dev ? dev->bus_id : "?"); | ||
494 | |||
495 | if (size > io_tlb_overflow && do_panic) { | ||
496 | if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL) | ||
497 | panic("PCI-DMA: Memory would be corrupted\n"); | ||
498 | if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL) | ||
499 | panic("PCI-DMA: Random memory would be DMAed\n"); | ||
500 | } | ||
501 | } | ||
502 | |||
503 | /* | ||
504 | * Map a single buffer of the indicated size for DMA in streaming mode. The | ||
505 | * PCI address to use is returned. | ||
506 | * | ||
507 | * Once the device is given the dma address, the device owns this memory until | ||
508 | * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed. | ||
509 | */ | ||
510 | dma_addr_t | ||
511 | swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir) | ||
512 | { | ||
513 | unsigned long dev_addr = virt_to_phys(ptr); | ||
514 | void *map; | ||
515 | |||
516 | if (dir == DMA_NONE) | ||
517 | BUG(); | ||
518 | /* | ||
519 | * If the pointer passed in happens to be in the device's DMA window, | ||
520 | * we can safely return the device addr and not worry about bounce | ||
521 | * buffering it. | ||
522 | */ | ||
523 | if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force) | ||
524 | return dev_addr; | ||
525 | |||
526 | /* | ||
527 | * Oh well, have to allocate and map a bounce buffer. | ||
528 | */ | ||
529 | map = map_single(hwdev, ptr, size, dir); | ||
530 | if (!map) { | ||
531 | swiotlb_full(hwdev, size, dir, 1); | ||
532 | map = io_tlb_overflow_buffer; | ||
533 | } | ||
534 | |||
535 | dev_addr = virt_to_phys(map); | ||
536 | |||
537 | /* | ||
538 | * Ensure that the address returned is DMA'ble | ||
539 | */ | ||
540 | if (address_needs_mapping(hwdev, dev_addr)) | ||
541 | panic("map_single: bounce buffer is not DMA'ble"); | ||
542 | |||
543 | return dev_addr; | ||
544 | } | ||
545 | |||
546 | /* | ||
547 | * Since DMA is i-cache coherent, any (complete) pages that were written via | ||
548 | * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to | ||
549 | * flush them when they get mapped into an executable vm-area. | ||
550 | */ | ||
551 | static void | ||
552 | mark_clean(void *addr, size_t size) | ||
553 | { | ||
554 | unsigned long pg_addr, end; | ||
555 | |||
556 | pg_addr = PAGE_ALIGN((unsigned long) addr); | ||
557 | end = (unsigned long) addr + size; | ||
558 | while (pg_addr + PAGE_SIZE <= end) { | ||
559 | struct page *page = virt_to_page(pg_addr); | ||
560 | set_bit(PG_arch_1, &page->flags); | ||
561 | pg_addr += PAGE_SIZE; | ||
562 | } | ||
563 | } | ||
564 | |||
565 | /* | ||
566 | * Unmap a single streaming mode DMA translation. The dma_addr and size must | ||
567 | * match what was provided for in a previous swiotlb_map_single call. All | ||
568 | * other usages are undefined. | ||
569 | * | ||
570 | * After this call, reads by the cpu to the buffer are guaranteed to see | ||
571 | * whatever the device wrote there. | ||
572 | */ | ||
573 | void | ||
574 | swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size, | ||
575 | int dir) | ||
576 | { | ||
577 | char *dma_addr = phys_to_virt(dev_addr); | ||
578 | |||
579 | if (dir == DMA_NONE) | ||
580 | BUG(); | ||
581 | if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end) | ||
582 | unmap_single(hwdev, dma_addr, size, dir); | ||
583 | else if (dir == DMA_FROM_DEVICE) | ||
584 | mark_clean(dma_addr, size); | ||
585 | } | ||
586 | |||
587 | /* | ||
588 | * Make physical memory consistent for a single streaming mode DMA translation | ||
589 | * after a transfer. | ||
590 | * | ||
591 | * If you perform a swiotlb_map_single() but wish to interrogate the buffer | ||
592 | * using the cpu, yet do not wish to teardown the PCI dma mapping, you must | ||
593 | * call this function before doing so. At the next point you give the PCI dma | ||
594 | * address back to the card, you must first perform a | ||
595 | * swiotlb_dma_sync_for_device, and then the device again owns the buffer | ||
596 | */ | ||
597 | void | ||
598 | swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr, | ||
599 | size_t size, int dir) | ||
600 | { | ||
601 | char *dma_addr = phys_to_virt(dev_addr); | ||
602 | |||
603 | if (dir == DMA_NONE) | ||
604 | BUG(); | ||
605 | if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end) | ||
606 | sync_single(hwdev, dma_addr, size, dir); | ||
607 | else if (dir == DMA_FROM_DEVICE) | ||
608 | mark_clean(dma_addr, size); | ||
609 | } | ||
610 | |||
611 | void | ||
612 | swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr, | ||
613 | size_t size, int dir) | ||
614 | { | ||
615 | char *dma_addr = phys_to_virt(dev_addr); | ||
616 | |||
617 | if (dir == DMA_NONE) | ||
618 | BUG(); | ||
619 | if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end) | ||
620 | sync_single(hwdev, dma_addr, size, dir); | ||
621 | else if (dir == DMA_FROM_DEVICE) | ||
622 | mark_clean(dma_addr, size); | ||
623 | } | ||
624 | |||
625 | /* | ||
626 | * Map a set of buffers described by scatterlist in streaming mode for DMA. | ||
627 | * This is the scatter-gather version of the above swiotlb_map_single | ||
628 | * interface. Here the scatter gather list elements are each tagged with the | ||
629 | * appropriate dma address and length. They are obtained via | ||
630 | * sg_dma_{address,length}(SG). | ||
631 | * | ||
632 | * NOTE: An implementation may be able to use a smaller number of | ||
633 | * DMA address/length pairs than there are SG table elements. | ||
634 | * (for example via virtual mapping capabilities) | ||
635 | * The routine returns the number of addr/length pairs actually | ||
636 | * used, at most nents. | ||
637 | * | ||
638 | * Device ownership issues as mentioned above for swiotlb_map_single are the | ||
639 | * same here. | ||
640 | */ | ||
641 | int | ||
642 | swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems, | ||
643 | int dir) | ||
644 | { | ||
645 | void *addr; | ||
646 | unsigned long dev_addr; | ||
647 | int i; | ||
648 | |||
649 | if (dir == DMA_NONE) | ||
650 | BUG(); | ||
651 | |||
652 | for (i = 0; i < nelems; i++, sg++) { | ||
653 | addr = SG_ENT_VIRT_ADDRESS(sg); | ||
654 | dev_addr = virt_to_phys(addr); | ||
655 | if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) { | ||
656 | sg->dma_address = (dma_addr_t) virt_to_phys(map_single(hwdev, addr, sg->length, dir)); | ||
657 | if (!sg->dma_address) { | ||
658 | /* Don't panic here, we expect map_sg users | ||
659 | to do proper error handling. */ | ||
660 | swiotlb_full(hwdev, sg->length, dir, 0); | ||
661 | swiotlb_unmap_sg(hwdev, sg - i, i, dir); | ||
662 | sg[0].dma_length = 0; | ||
663 | return 0; | ||
664 | } | ||
665 | } else | ||
666 | sg->dma_address = dev_addr; | ||
667 | sg->dma_length = sg->length; | ||
668 | } | ||
669 | return nelems; | ||
670 | } | ||
671 | |||
672 | /* | ||
673 | * Unmap a set of streaming mode DMA translations. Again, cpu read rules | ||
674 | * concerning calls here are the same as for swiotlb_unmap_single() above. | ||
675 | */ | ||
676 | void | ||
677 | swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems, | ||
678 | int dir) | ||
679 | { | ||
680 | int i; | ||
681 | |||
682 | if (dir == DMA_NONE) | ||
683 | BUG(); | ||
684 | |||
685 | for (i = 0; i < nelems; i++, sg++) | ||
686 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | ||
687 | unmap_single(hwdev, (void *) phys_to_virt(sg->dma_address), sg->dma_length, dir); | ||
688 | else if (dir == DMA_FROM_DEVICE) | ||
689 | mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length); | ||
690 | } | ||
691 | |||
692 | /* | ||
693 | * Make physical memory consistent for a set of streaming mode DMA translations | ||
694 | * after a transfer. | ||
695 | * | ||
696 | * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules | ||
697 | * and usage. | ||
698 | */ | ||
699 | void | ||
700 | swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg, | ||
701 | int nelems, int dir) | ||
702 | { | ||
703 | int i; | ||
704 | |||
705 | if (dir == DMA_NONE) | ||
706 | BUG(); | ||
707 | |||
708 | for (i = 0; i < nelems; i++, sg++) | ||
709 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | ||
710 | sync_single(hwdev, (void *) sg->dma_address, | ||
711 | sg->dma_length, dir); | ||
712 | } | ||
713 | |||
714 | void | ||
715 | swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg, | ||
716 | int nelems, int dir) | ||
717 | { | ||
718 | int i; | ||
719 | |||
720 | if (dir == DMA_NONE) | ||
721 | BUG(); | ||
722 | |||
723 | for (i = 0; i < nelems; i++, sg++) | ||
724 | if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg)) | ||
725 | sync_single(hwdev, (void *) sg->dma_address, | ||
726 | sg->dma_length, dir); | ||
727 | } | ||
728 | |||
729 | int | ||
730 | swiotlb_dma_mapping_error(dma_addr_t dma_addr) | ||
731 | { | ||
732 | return (dma_addr == virt_to_phys(io_tlb_overflow_buffer)); | ||
733 | } | ||
734 | |||
735 | /* | ||
736 | * Return whether the given PCI device DMA address mask can be supported | ||
737 | * properly. For example, if your device can only drive the low 24-bits | ||
738 | * during PCI bus mastering, then you would pass 0x00ffffff as the mask to | ||
739 | * this function. | ||
740 | */ | ||
741 | int | ||
742 | swiotlb_dma_supported (struct device *hwdev, u64 mask) | ||
743 | { | ||
744 | return (virt_to_phys (io_tlb_end) - 1) <= mask; | ||
745 | } | ||
746 | |||
747 | EXPORT_SYMBOL(swiotlb_init); | ||
748 | EXPORT_SYMBOL(swiotlb_map_single); | ||
749 | EXPORT_SYMBOL(swiotlb_unmap_single); | ||
750 | EXPORT_SYMBOL(swiotlb_map_sg); | ||
751 | EXPORT_SYMBOL(swiotlb_unmap_sg); | ||
752 | EXPORT_SYMBOL(swiotlb_sync_single_for_cpu); | ||
753 | EXPORT_SYMBOL(swiotlb_sync_single_for_device); | ||
754 | EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu); | ||
755 | EXPORT_SYMBOL(swiotlb_sync_sg_for_device); | ||
756 | EXPORT_SYMBOL(swiotlb_dma_mapping_error); | ||
757 | EXPORT_SYMBOL(swiotlb_alloc_coherent); | ||
758 | EXPORT_SYMBOL(swiotlb_free_coherent); | ||
759 | EXPORT_SYMBOL(swiotlb_dma_supported); | ||