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authorLen Brown <len.brown@intel.com>2005-12-06 17:31:30 -0500
committerLen Brown <len.brown@intel.com>2005-12-06 17:31:30 -0500
commit3d5271f9883cba7b54762bc4fe027d4172f06db7 (patch)
treeab8a881a14478598a0c8bda0d26c62cdccfffd6d /arch/ia64/lib
parent378b2556f4e09fa6f87ff0cb5c4395ff28257d02 (diff)
parent9115a6c787596e687df03010d97fccc5e0762506 (diff)
Pull release into acpica branch
Diffstat (limited to 'arch/ia64/lib')
-rw-r--r--arch/ia64/lib/Makefile2
-rw-r--r--arch/ia64/lib/swiotlb.c657
2 files changed, 1 insertions, 658 deletions
diff --git a/arch/ia64/lib/Makefile b/arch/ia64/lib/Makefile
index cb1af597370b..ac64664a1807 100644
--- a/arch/ia64/lib/Makefile
+++ b/arch/ia64/lib/Makefile
@@ -9,7 +9,7 @@ lib-y := __divsi3.o __udivsi3.o __modsi3.o __umodsi3.o \
9 bitop.o checksum.o clear_page.o csum_partial_copy.o \ 9 bitop.o checksum.o clear_page.o csum_partial_copy.o \
10 clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \ 10 clear_user.o strncpy_from_user.o strlen_user.o strnlen_user.o \
11 flush.o ip_fast_csum.o do_csum.o \ 11 flush.o ip_fast_csum.o do_csum.o \
12 memset.o strlen.o swiotlb.o 12 memset.o strlen.o
13 13
14lib-$(CONFIG_ITANIUM) += copy_page.o copy_user.o memcpy.o 14lib-$(CONFIG_ITANIUM) += copy_page.o copy_user.o memcpy.o
15lib-$(CONFIG_MCKINLEY) += copy_page_mck.o memcpy_mck.o 15lib-$(CONFIG_MCKINLEY) += copy_page_mck.o memcpy_mck.o
diff --git a/arch/ia64/lib/swiotlb.c b/arch/ia64/lib/swiotlb.c
deleted file mode 100644
index dbc0b3e449c5..000000000000
--- a/arch/ia64/lib/swiotlb.c
+++ /dev/null
@@ -1,657 +0,0 @@
1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is for IA-64 platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 */
16
17#include <linux/cache.h>
18#include <linux/mm.h>
19#include <linux/module.h>
20#include <linux/pci.h>
21#include <linux/spinlock.h>
22#include <linux/string.h>
23#include <linux/types.h>
24#include <linux/ctype.h>
25
26#include <asm/io.h>
27#include <asm/pci.h>
28#include <asm/dma.h>
29
30#include <linux/init.h>
31#include <linux/bootmem.h>
32
33#define OFFSET(val,align) ((unsigned long) \
34 ( (val) & ( (align) - 1)))
35
36#define SG_ENT_VIRT_ADDRESS(sg) (page_address((sg)->page) + (sg)->offset)
37#define SG_ENT_PHYS_ADDRESS(SG) virt_to_phys(SG_ENT_VIRT_ADDRESS(SG))
38
39/*
40 * Maximum allowable number of contiguous slabs to map,
41 * must be a power of 2. What is the appropriate value ?
42 * The complexity of {map,unmap}_single is linearly dependent on this value.
43 */
44#define IO_TLB_SEGSIZE 128
45
46/*
47 * log of the size of each IO TLB slab. The number of slabs is command line
48 * controllable.
49 */
50#define IO_TLB_SHIFT 11
51
52int swiotlb_force;
53
54/*
55 * Used to do a quick range check in swiotlb_unmap_single and
56 * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
57 * API.
58 */
59static char *io_tlb_start, *io_tlb_end;
60
61/*
62 * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
63 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
64 */
65static unsigned long io_tlb_nslabs;
66
67/*
68 * When the IOMMU overflows we return a fallback buffer. This sets the size.
69 */
70static unsigned long io_tlb_overflow = 32*1024;
71
72void *io_tlb_overflow_buffer;
73
74/*
75 * This is a free list describing the number of free entries available from
76 * each index
77 */
78static unsigned int *io_tlb_list;
79static unsigned int io_tlb_index;
80
81/*
82 * We need to save away the original address corresponding to a mapped entry
83 * for the sync operations.
84 */
85static unsigned char **io_tlb_orig_addr;
86
87/*
88 * Protect the above data structures in the map and unmap calls
89 */
90static DEFINE_SPINLOCK(io_tlb_lock);
91
92static int __init
93setup_io_tlb_npages(char *str)
94{
95 if (isdigit(*str)) {
96 io_tlb_nslabs = simple_strtoul(str, &str, 0);
97 /* avoid tail segment of size < IO_TLB_SEGSIZE */
98 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
99 }
100 if (*str == ',')
101 ++str;
102 if (!strcmp(str, "force"))
103 swiotlb_force = 1;
104 return 1;
105}
106__setup("swiotlb=", setup_io_tlb_npages);
107/* make io_tlb_overflow tunable too? */
108
109/*
110 * Statically reserve bounce buffer space and initialize bounce buffer data
111 * structures for the software IO TLB used to implement the PCI DMA API.
112 */
113void
114swiotlb_init_with_default_size (size_t default_size)
115{
116 unsigned long i;
117
118 if (!io_tlb_nslabs) {
119 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
120 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
121 }
122
123 /*
124 * Get IO TLB memory from the low pages
125 */
126 io_tlb_start = alloc_bootmem_low_pages(io_tlb_nslabs *
127 (1 << IO_TLB_SHIFT));
128 if (!io_tlb_start)
129 panic("Cannot allocate SWIOTLB buffer");
130 io_tlb_end = io_tlb_start + io_tlb_nslabs * (1 << IO_TLB_SHIFT);
131
132 /*
133 * Allocate and initialize the free list array. This array is used
134 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
135 * between io_tlb_start and io_tlb_end.
136 */
137 io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
138 for (i = 0; i < io_tlb_nslabs; i++)
139 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
140 io_tlb_index = 0;
141 io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
142
143 /*
144 * Get the overflow emergency buffer
145 */
146 io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
147 printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
148 virt_to_phys(io_tlb_start), virt_to_phys(io_tlb_end));
149}
150
151void
152swiotlb_init (void)
153{
154 swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
155}
156
157static inline int
158address_needs_mapping(struct device *hwdev, dma_addr_t addr)
159{
160 dma_addr_t mask = 0xffffffff;
161 /* If the device has a mask, use it, otherwise default to 32 bits */
162 if (hwdev && hwdev->dma_mask)
163 mask = *hwdev->dma_mask;
164 return (addr & ~mask) != 0;
165}
166
167/*
168 * Allocates bounce buffer and returns its kernel virtual address.
169 */
170static void *
171map_single(struct device *hwdev, char *buffer, size_t size, int dir)
172{
173 unsigned long flags;
174 char *dma_addr;
175 unsigned int nslots, stride, index, wrap;
176 int i;
177
178 /*
179 * For mappings greater than a page, we limit the stride (and
180 * hence alignment) to a page size.
181 */
182 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
183 if (size > PAGE_SIZE)
184 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
185 else
186 stride = 1;
187
188 if (!nslots)
189 BUG();
190
191 /*
192 * Find suitable number of IO TLB entries size that will fit this
193 * request and allocate a buffer from that IO TLB pool.
194 */
195 spin_lock_irqsave(&io_tlb_lock, flags);
196 {
197 wrap = index = ALIGN(io_tlb_index, stride);
198
199 if (index >= io_tlb_nslabs)
200 wrap = index = 0;
201
202 do {
203 /*
204 * If we find a slot that indicates we have 'nslots'
205 * number of contiguous buffers, we allocate the
206 * buffers from that slot and mark the entries as '0'
207 * indicating unavailable.
208 */
209 if (io_tlb_list[index] >= nslots) {
210 int count = 0;
211
212 for (i = index; i < (int) (index + nslots); i++)
213 io_tlb_list[i] = 0;
214 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
215 io_tlb_list[i] = ++count;
216 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
217
218 /*
219 * Update the indices to avoid searching in
220 * the next round.
221 */
222 io_tlb_index = ((index + nslots) < io_tlb_nslabs
223 ? (index + nslots) : 0);
224
225 goto found;
226 }
227 index += stride;
228 if (index >= io_tlb_nslabs)
229 index = 0;
230 } while (index != wrap);
231
232 spin_unlock_irqrestore(&io_tlb_lock, flags);
233 return NULL;
234 }
235 found:
236 spin_unlock_irqrestore(&io_tlb_lock, flags);
237
238 /*
239 * Save away the mapping from the original address to the DMA address.
240 * This is needed when we sync the memory. Then we sync the buffer if
241 * needed.
242 */
243 io_tlb_orig_addr[index] = buffer;
244 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
245 memcpy(dma_addr, buffer, size);
246
247 return dma_addr;
248}
249
250/*
251 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
252 */
253static void
254unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
255{
256 unsigned long flags;
257 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
258 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
259 char *buffer = io_tlb_orig_addr[index];
260
261 /*
262 * First, sync the memory before unmapping the entry
263 */
264 if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
265 /*
266 * bounce... copy the data back into the original buffer * and
267 * delete the bounce buffer.
268 */
269 memcpy(buffer, dma_addr, size);
270
271 /*
272 * Return the buffer to the free list by setting the corresponding
273 * entries to indicate the number of contigous entries available.
274 * While returning the entries to the free list, we merge the entries
275 * with slots below and above the pool being returned.
276 */
277 spin_lock_irqsave(&io_tlb_lock, flags);
278 {
279 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
280 io_tlb_list[index + nslots] : 0);
281 /*
282 * Step 1: return the slots to the free list, merging the
283 * slots with superceeding slots
284 */
285 for (i = index + nslots - 1; i >= index; i--)
286 io_tlb_list[i] = ++count;
287 /*
288 * Step 2: merge the returned slots with the preceding slots,
289 * if available (non zero)
290 */
291 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
292 io_tlb_list[i] = ++count;
293 }
294 spin_unlock_irqrestore(&io_tlb_lock, flags);
295}
296
297static void
298sync_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
299{
300 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
301 char *buffer = io_tlb_orig_addr[index];
302
303 /*
304 * bounce... copy the data back into/from the original buffer
305 * XXX How do you handle DMA_BIDIRECTIONAL here ?
306 */
307 if (dir == DMA_FROM_DEVICE)
308 memcpy(buffer, dma_addr, size);
309 else if (dir == DMA_TO_DEVICE)
310 memcpy(dma_addr, buffer, size);
311 else
312 BUG();
313}
314
315void *
316swiotlb_alloc_coherent(struct device *hwdev, size_t size,
317 dma_addr_t *dma_handle, int flags)
318{
319 unsigned long dev_addr;
320 void *ret;
321 int order = get_order(size);
322
323 /*
324 * XXX fix me: the DMA API should pass us an explicit DMA mask
325 * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
326 * bit range instead of a 16MB one).
327 */
328 flags |= GFP_DMA;
329
330 ret = (void *)__get_free_pages(flags, order);
331 if (ret && address_needs_mapping(hwdev, virt_to_phys(ret))) {
332 /*
333 * The allocated memory isn't reachable by the device.
334 * Fall back on swiotlb_map_single().
335 */
336 free_pages((unsigned long) ret, order);
337 ret = NULL;
338 }
339 if (!ret) {
340 /*
341 * We are either out of memory or the device can't DMA
342 * to GFP_DMA memory; fall back on
343 * swiotlb_map_single(), which will grab memory from
344 * the lowest available address range.
345 */
346 dma_addr_t handle;
347 handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
348 if (dma_mapping_error(handle))
349 return NULL;
350
351 ret = phys_to_virt(handle);
352 }
353
354 memset(ret, 0, size);
355 dev_addr = virt_to_phys(ret);
356
357 /* Confirm address can be DMA'd by device */
358 if (address_needs_mapping(hwdev, dev_addr)) {
359 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016lx\n",
360 (unsigned long long)*hwdev->dma_mask, dev_addr);
361 panic("swiotlb_alloc_coherent: allocated memory is out of "
362 "range for device");
363 }
364 *dma_handle = dev_addr;
365 return ret;
366}
367
368void
369swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
370 dma_addr_t dma_handle)
371{
372 if (!(vaddr >= (void *)io_tlb_start
373 && vaddr < (void *)io_tlb_end))
374 free_pages((unsigned long) vaddr, get_order(size));
375 else
376 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
377 swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
378}
379
380static void
381swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
382{
383 /*
384 * Ran out of IOMMU space for this operation. This is very bad.
385 * Unfortunately the drivers cannot handle this operation properly.
386 * unless they check for pci_dma_mapping_error (most don't)
387 * When the mapping is small enough return a static buffer to limit
388 * the damage, or panic when the transfer is too big.
389 */
390 printk(KERN_ERR "PCI-DMA: Out of SW-IOMMU space for %lu bytes at "
391 "device %s\n", size, dev ? dev->bus_id : "?");
392
393 if (size > io_tlb_overflow && do_panic) {
394 if (dir == PCI_DMA_FROMDEVICE || dir == PCI_DMA_BIDIRECTIONAL)
395 panic("PCI-DMA: Memory would be corrupted\n");
396 if (dir == PCI_DMA_TODEVICE || dir == PCI_DMA_BIDIRECTIONAL)
397 panic("PCI-DMA: Random memory would be DMAed\n");
398 }
399}
400
401/*
402 * Map a single buffer of the indicated size for DMA in streaming mode. The
403 * PCI address to use is returned.
404 *
405 * Once the device is given the dma address, the device owns this memory until
406 * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
407 */
408dma_addr_t
409swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
410{
411 unsigned long dev_addr = virt_to_phys(ptr);
412 void *map;
413
414 if (dir == DMA_NONE)
415 BUG();
416 /*
417 * If the pointer passed in happens to be in the device's DMA window,
418 * we can safely return the device addr and not worry about bounce
419 * buffering it.
420 */
421 if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
422 return dev_addr;
423
424 /*
425 * Oh well, have to allocate and map a bounce buffer.
426 */
427 map = map_single(hwdev, ptr, size, dir);
428 if (!map) {
429 swiotlb_full(hwdev, size, dir, 1);
430 map = io_tlb_overflow_buffer;
431 }
432
433 dev_addr = virt_to_phys(map);
434
435 /*
436 * Ensure that the address returned is DMA'ble
437 */
438 if (address_needs_mapping(hwdev, dev_addr))
439 panic("map_single: bounce buffer is not DMA'ble");
440
441 return dev_addr;
442}
443
444/*
445 * Since DMA is i-cache coherent, any (complete) pages that were written via
446 * DMA can be marked as "clean" so that lazy_mmu_prot_update() doesn't have to
447 * flush them when they get mapped into an executable vm-area.
448 */
449static void
450mark_clean(void *addr, size_t size)
451{
452 unsigned long pg_addr, end;
453
454 pg_addr = PAGE_ALIGN((unsigned long) addr);
455 end = (unsigned long) addr + size;
456 while (pg_addr + PAGE_SIZE <= end) {
457 struct page *page = virt_to_page(pg_addr);
458 set_bit(PG_arch_1, &page->flags);
459 pg_addr += PAGE_SIZE;
460 }
461}
462
463/*
464 * Unmap a single streaming mode DMA translation. The dma_addr and size must
465 * match what was provided for in a previous swiotlb_map_single call. All
466 * other usages are undefined.
467 *
468 * After this call, reads by the cpu to the buffer are guaranteed to see
469 * whatever the device wrote there.
470 */
471void
472swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
473 int dir)
474{
475 char *dma_addr = phys_to_virt(dev_addr);
476
477 if (dir == DMA_NONE)
478 BUG();
479 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
480 unmap_single(hwdev, dma_addr, size, dir);
481 else if (dir == DMA_FROM_DEVICE)
482 mark_clean(dma_addr, size);
483}
484
485/*
486 * Make physical memory consistent for a single streaming mode DMA translation
487 * after a transfer.
488 *
489 * If you perform a swiotlb_map_single() but wish to interrogate the buffer
490 * using the cpu, yet do not wish to teardown the PCI dma mapping, you must
491 * call this function before doing so. At the next point you give the PCI dma
492 * address back to the card, you must first perform a
493 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
494 */
495void
496swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
497 size_t size, int dir)
498{
499 char *dma_addr = phys_to_virt(dev_addr);
500
501 if (dir == DMA_NONE)
502 BUG();
503 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
504 sync_single(hwdev, dma_addr, size, dir);
505 else if (dir == DMA_FROM_DEVICE)
506 mark_clean(dma_addr, size);
507}
508
509void
510swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
511 size_t size, int dir)
512{
513 char *dma_addr = phys_to_virt(dev_addr);
514
515 if (dir == DMA_NONE)
516 BUG();
517 if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
518 sync_single(hwdev, dma_addr, size, dir);
519 else if (dir == DMA_FROM_DEVICE)
520 mark_clean(dma_addr, size);
521}
522
523/*
524 * Map a set of buffers described by scatterlist in streaming mode for DMA.
525 * This is the scatter-gather version of the above swiotlb_map_single
526 * interface. Here the scatter gather list elements are each tagged with the
527 * appropriate dma address and length. They are obtained via
528 * sg_dma_{address,length}(SG).
529 *
530 * NOTE: An implementation may be able to use a smaller number of
531 * DMA address/length pairs than there are SG table elements.
532 * (for example via virtual mapping capabilities)
533 * The routine returns the number of addr/length pairs actually
534 * used, at most nents.
535 *
536 * Device ownership issues as mentioned above for swiotlb_map_single are the
537 * same here.
538 */
539int
540swiotlb_map_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
541 int dir)
542{
543 void *addr;
544 unsigned long dev_addr;
545 int i;
546
547 if (dir == DMA_NONE)
548 BUG();
549
550 for (i = 0; i < nelems; i++, sg++) {
551 addr = SG_ENT_VIRT_ADDRESS(sg);
552 dev_addr = virt_to_phys(addr);
553 if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
554 sg->dma_address = (dma_addr_t) virt_to_phys(map_single(hwdev, addr, sg->length, dir));
555 if (!sg->dma_address) {
556 /* Don't panic here, we expect map_sg users
557 to do proper error handling. */
558 swiotlb_full(hwdev, sg->length, dir, 0);
559 swiotlb_unmap_sg(hwdev, sg - i, i, dir);
560 sg[0].dma_length = 0;
561 return 0;
562 }
563 } else
564 sg->dma_address = dev_addr;
565 sg->dma_length = sg->length;
566 }
567 return nelems;
568}
569
570/*
571 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
572 * concerning calls here are the same as for swiotlb_unmap_single() above.
573 */
574void
575swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nelems,
576 int dir)
577{
578 int i;
579
580 if (dir == DMA_NONE)
581 BUG();
582
583 for (i = 0; i < nelems; i++, sg++)
584 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
585 unmap_single(hwdev, (void *) phys_to_virt(sg->dma_address), sg->dma_length, dir);
586 else if (dir == DMA_FROM_DEVICE)
587 mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
588}
589
590/*
591 * Make physical memory consistent for a set of streaming mode DMA translations
592 * after a transfer.
593 *
594 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
595 * and usage.
596 */
597void
598swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
599 int nelems, int dir)
600{
601 int i;
602
603 if (dir == DMA_NONE)
604 BUG();
605
606 for (i = 0; i < nelems; i++, sg++)
607 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
608 sync_single(hwdev, (void *) sg->dma_address,
609 sg->dma_length, dir);
610}
611
612void
613swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
614 int nelems, int dir)
615{
616 int i;
617
618 if (dir == DMA_NONE)
619 BUG();
620
621 for (i = 0; i < nelems; i++, sg++)
622 if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
623 sync_single(hwdev, (void *) sg->dma_address,
624 sg->dma_length, dir);
625}
626
627int
628swiotlb_dma_mapping_error(dma_addr_t dma_addr)
629{
630 return (dma_addr == virt_to_phys(io_tlb_overflow_buffer));
631}
632
633/*
634 * Return whether the given PCI device DMA address mask can be supported
635 * properly. For example, if your device can only drive the low 24-bits
636 * during PCI bus mastering, then you would pass 0x00ffffff as the mask to
637 * this function.
638 */
639int
640swiotlb_dma_supported (struct device *hwdev, u64 mask)
641{
642 return (virt_to_phys (io_tlb_end) - 1) <= mask;
643}
644
645EXPORT_SYMBOL(swiotlb_init);
646EXPORT_SYMBOL(swiotlb_map_single);
647EXPORT_SYMBOL(swiotlb_unmap_single);
648EXPORT_SYMBOL(swiotlb_map_sg);
649EXPORT_SYMBOL(swiotlb_unmap_sg);
650EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
651EXPORT_SYMBOL(swiotlb_sync_single_for_device);
652EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
653EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
654EXPORT_SYMBOL(swiotlb_dma_mapping_error);
655EXPORT_SYMBOL(swiotlb_alloc_coherent);
656EXPORT_SYMBOL(swiotlb_free_coherent);
657EXPORT_SYMBOL(swiotlb_dma_supported);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 04:31:57 -0500