diff options
author | Fenghua Yu <fenghua.yu@intel.com> | 2008-03-14 16:57:08 -0400 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2008-04-04 14:06:38 -0400 |
commit | a6c75b86ce9f01db4ea9912877b526c2dc4d2f0a (patch) | |
tree | a8763d9be28ffff5d28f1ff3235f044aaa64a0fa /arch/ia64/kernel/setup.c | |
parent | 2046b94e7c4fce92eb8165c2c36c6478f4927178 (diff) |
[IA64] Kernel parameter for max number of concurrent global TLB purges
The patch defines kernel parameter "nptcg=". The parameter overrides max number
of concurrent global TLB purges which is reported from either PAL_VM_SUMMARY or
SAL PALO.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/setup.c')
-rw-r--r-- | arch/ia64/kernel/setup.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c index 1cbd26340d87..f798c0769d36 100644 --- a/arch/ia64/kernel/setup.c +++ b/arch/ia64/kernel/setup.c | |||
@@ -949,7 +949,7 @@ cpu_init (void) | |||
949 | /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */ | 949 | /* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */ |
950 | if (ia64_pal_vm_summary(NULL, &vmi) == 0) { | 950 | if (ia64_pal_vm_summary(NULL, &vmi) == 0) { |
951 | max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1; | 951 | max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1; |
952 | setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, 0); | 952 | setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, NPTCG_FROM_PAL); |
953 | } else { | 953 | } else { |
954 | printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n"); | 954 | printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n"); |
955 | max_ctx = (1U << 15) - 1; /* use architected minimum */ | 955 | max_ctx = (1U << 15) - 1; /* use architected minimum */ |