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authorTony Luck <tony.luck@intel.com>2008-05-27 16:23:16 -0400
committerTony Luck <tony.luck@intel.com>2008-05-27 16:24:39 -0400
commit4dcc29e1574d88f4465ba865ed82800032f76418 (patch)
tree5579a225a6782f0f5014cbbe6938847b7f3cd53f /arch/ia64/kernel/patch.c
parente490517a039a99d692cb3a5561941b0a5f576172 (diff)
[IA64] Workaround for RSE issue
Problem: An application violating the architectural rules regarding operation dependencies and having specific Register Stack Engine (RSE) state at the time of the violation, may result in an illegal operation fault and invalid RSE state. Such faults may initiate a cascade of repeated illegal operation faults within OS interruption handlers. The specific behavior is OS dependent. Implication: An application causing an illegal operation fault with specific RSE state may result in a series of illegal operation faults and an eventual OS stack overflow condition. Workaround: OS interruption handlers that switch to kernel backing store implement a check for invalid RSE state to avoid the series of illegal operation faults. The core of the workaround is the RSE_WORKAROUND code sequence inserted into each invocation of the SAVE_MIN_WITH_COVER and SAVE_MIN_WITH_COVER_R19 macros. This sequence includes hard-coded constants that depend on the number of stacked physical registers being 96. The rest of this patch consists of code to disable this workaround should this not be the case (with the presumption that if a future Itanium processor increases the number of registers, it would also remove the need for this patch). Move the start of the RBS up to a mod32 boundary to avoid some corner cases. The dispatch_illegal_op_fault code outgrew the spot it was squatting in when built with this patch and CONFIG_VIRT_CPU_ACCOUNTING=y Move it out to the end of the ivt. Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/patch.c')
-rw-r--r--arch/ia64/kernel/patch.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/ia64/kernel/patch.c b/arch/ia64/kernel/patch.c
index e0dca8743dbb..b83b2c516008 100644
--- a/arch/ia64/kernel/patch.c
+++ b/arch/ia64/kernel/patch.c
@@ -115,6 +115,29 @@ ia64_patch_vtop (unsigned long start, unsigned long end)
115 ia64_srlz_i(); 115 ia64_srlz_i();
116} 116}
117 117
118/*
119 * Disable the RSE workaround by turning the conditional branch
120 * that we tagged in each place the workaround was used into an
121 * unconditional branch.
122 */
123void __init
124ia64_patch_rse (unsigned long start, unsigned long end)
125{
126 s32 *offp = (s32 *) start;
127 u64 ip, *b;
128
129 while (offp < (s32 *) end) {
130 ip = (u64) offp + *offp;
131
132 b = (u64 *)(ip & -16);
133 b[1] &= ~0xf800000L;
134 ia64_fc((void *) ip);
135 ++offp;
136 }
137 ia64_sync_i();
138 ia64_srlz_i();
139}
140
118void __init 141void __init
119ia64_patch_mckinley_e9 (unsigned long start, unsigned long end) 142ia64_patch_mckinley_e9 (unsigned long start, unsigned long end)
120{ 143{