[IA64] More Itanium PAL spec updates

Additional updates to conform with Rev 2.2 of Volume 2 of "Intel
Itanium Architecture Software Developer's Manual" (January 2006).

Add pal_bus_features_s bits 52 & 53 (page 2:347)
Add pal_vm_info_2_s field max_purges (page 2:2:451)
Add PAL_GET_HW_POLICY call (page 2:381)
Add PAL_SET_HW_POLICY call (page 2:439)

Sample output before:
---------------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/vm_info
Physical Address Space         : 50 bits
Virtual Address Space          : 61 bits
Protection Key Registers(PKR)  : 16
Implemented bits in PKR.key    : 24
Hash Tag ID                    : 0x2
Size of RR.rid                 : 24
Supported memory attributes    : WB, UC, UCE, WC, NaTPage
---------------------------------------------------------------------

Sample output after:
---------------------------------------------------------------------
cobra:~ # cat /proc/pal/cpu0/vm_info
Physical Address Space         : 50 bits
Virtual Address Space          : 61 bits
Protection Key Registers(PKR)  : 16
Implemented bits in PKR.key    : 24
Hash Tag ID                    : 0x2
Max Purges                     : 1
Size of RR.rid                 : 24
Supported memory attributes    : WB, UC, UCE, WC, NaTPage
---------------------------------------------------------------------

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>

1 files changed, 8 insertions, 1 deletions

diff --git a/arch/ia64/kernel/palinfo.c b/arch/ia64/kernel/palinfo.c
index ca1884ed5a06..32f81b38ae48 100644
--- a/arch/ia64/kernel/palinfo.c
+++ b/arch/ia64/kernel/palinfo.c
@@ -315,13 +315,20 @@ vm_info(char *page)
                      "Protection Key Registers(PKR)  : %d\n"
                      "Implemented bits in PKR.key    : %d\n"
                      "Hash Tag ID                    : 0x%x\n"
-                     "Size of RR.rid                 : %d\n",
+                     "Size of RR.rid                 : %d\n"
+                     "Max Purges                     : ",
                      vm_info_1.pal_vm_info_1_s.phys_add_size,
                      vm_info_2.pal_vm_info_2_s.impl_va_msb+1,
                      vm_info_1.pal_vm_info_1_s.max_pkr+1,
                      vm_info_1.pal_vm_info_1_s.key_size,
                      vm_info_1.pal_vm_info_1_s.hash_tag_id,
                      vm_info_2.pal_vm_info_2_s.rid_size);
+                if (vm_info_2.pal_vm_info_2_s.max_purges == PAL_MAX_PURGES)
+                        p += sprintf(p, "unlimited\n");
+                else
+                        p += sprintf(p, "%d\n",
+                                vm_info_2.pal_vm_info_2_s.max_purges ?
+                                vm_info_2.pal_vm_info_2_s.max_purges : 1);
         }
 
         if (ia64_pal_mem_attrib(&attrib) == 0) {