[IA64] MCA recovery: kernel context recovery table

Memory errors encountered by user applications may surface
when the CPU is running in kernel context.  The current code
will not attempt recovery if the MCA surfaces in kernel
context (privilage mode 0).  This patch adds a check for cases
where the user initiated the load that surfaces in kernel
interrupt code.

An example is a user process lauching a load from memory
and the data in memory had bad ECC.  Before the bad data
gets to the CPU register, and interrupt comes in.  The
code jumps to the IVT interrupt entry point and begins
execution in kernel context.  The process of saving the
user registers (SAVE_REST) causes the bad data to be loaded
into a CPU register, triggering the MCA.  The MCA surfaces in
kernel context, even though the load was initiated from
user context.

As suggested by David and Tony, this patch uses an exception
table like approach, puting the tagged recovery addresses in
a searchable table.  One difference from the exception table
is that MCAs do not surface in precise places (such as with
a TLB miss), so instead of tagging specific instructions,
address ranges are registers.  A single macro is used to do
the tagging, with the input parameter being the label
of the starting address and the macro being the ending
address.  This limits clutter in the code.

This patch only tags one spot, the interrupt ivt entry.
Testing showed that spot to be a "heavy hitter" with
MCAs surfacing while saving user registers.  Other spots
can be added as needed by adding a single macro.

Signed-off-by: Russ Anderson (rja@sgi.com)
Signed-off-by: Tony Luck <tony.luck@intel.com>

1 files changed, 4 insertions, 9 deletions

diff --git a/arch/ia64/kernel/mca_drv_asm.S b/arch/ia64/kernel/mca_drv_asm.S
index 3f298ee4d00c..e6a580d354b9 100644
--- a/arch/ia64/kernel/mca_drv_asm.S
+++ b/arch/ia64/kernel/mca_drv_asm.S
@@ -14,15 +14,12 @@
 
 GLOBAL_ENTRY(mca_handler_bhhook)
         invala                          // clear RSE ?
-        ;;
         cover
         ;;
         clrrrb
         ;;                                              
-        alloc   r16=ar.pfs,0,2,1,0      // make a new frame
-        ;;
+        alloc   r16=ar.pfs,0,2,3,0      // make a new frame
         mov     ar.rsc=0
-        ;;
         mov     r13=IA64_KR(CURRENT)    // current task pointer
         ;;
         mov     r2=r13
@@ -30,7 +27,6 @@ GLOBAL_ENTRY(mca_handler_bhhook)
         addl    r22=IA64_RBS_OFFSET,r2
         ;;
         mov     ar.bspstore=r22
-        ;;
         addl    sp=IA64_STK_OFFSET-IA64_PT_REGS_SIZE,r2
         ;;
         adds    r2=IA64_TASK_THREAD_ON_USTACK_OFFSET,r13
@@ -40,12 +36,12 @@ GLOBAL_ENTRY(mca_handler_bhhook)
         movl    loc1=mca_handler_bh     // recovery C function
         ;;
         mov     out0=r8                 // poisoned address
+        mov     out1=r9                 // iip
+        mov     out2=r10                // psr
         mov     b6=loc1
         ;;
         mov     loc1=rp
-        ;;
-        ssm     psr.i
-        ;;
+        ssm     psr.i | psr.ic
         br.call.sptk.many rp=b6         // does not return ...
         ;;
         mov     ar.pfs=loc0
@@ -53,5 +49,4 @@ GLOBAL_ENTRY(mca_handler_bhhook)
         ;;
         mov     r8=r0
         br.ret.sptk.many rp
-        ;;
 END(mca_handler_bhhook)