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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 15:34:57 -0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-07 15:34:57 -0400 |
commit | a989705c4cf6e6c1a339c95f9daf658b4ba88ca8 (patch) | |
tree | d1925b831ec9fbae65db1b193dbad1869c43a9bc /arch/ia64/kernel/mca_asm.S | |
parent | 2d56d3c43cc97ae48586745556f5a5b564d61582 (diff) | |
parent | d29182534c5f39ff899763d1e0982d8f33791d6f (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] update memory attribute aliasing documentation & test cases
[IA64] fail mmaps that span areas with incompatible attributes
[IA64] allow WB /sys/.../legacy_mem mmaps
[IA64] make ioremap avoid unsupported attributes
[IA64] rename ioremap variables to match i386
[IA64] relax per-cpu TLB requirement to DTC
[IA64] remove per-cpu ia64_phys_stacked_size_p8
[IA64] Fix example error injection program
[IA64] Itanium MC Error Injection Tool: pal_mc_error_inject() interface
[IA64] Itanium MC Error Injection Tool: Makefile changes
[IA64] Itanium MC Error Injection Tool: Driver sysfs interface
[IA64] Itanium MC Error Injection Tool: Doc and sample application
[IA64] Itanium MC Error Injection Tool: Kernel configuration
Diffstat (limited to 'arch/ia64/kernel/mca_asm.S')
-rw-r--r-- | arch/ia64/kernel/mca_asm.S | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/ia64/kernel/mca_asm.S b/arch/ia64/kernel/mca_asm.S index c6b607c00dee..8c9c26aa6ae0 100644 --- a/arch/ia64/kernel/mca_asm.S +++ b/arch/ia64/kernel/mca_asm.S | |||
@@ -101,14 +101,6 @@ ia64_do_tlb_purge: | |||
101 | ;; | 101 | ;; |
102 | srlz.d | 102 | srlz.d |
103 | ;; | 103 | ;; |
104 | // 2. Purge DTR for PERCPU data. | ||
105 | movl r16=PERCPU_ADDR | ||
106 | mov r18=PERCPU_PAGE_SHIFT<<2 | ||
107 | ;; | ||
108 | ptr.d r16,r18 | ||
109 | ;; | ||
110 | srlz.d | ||
111 | ;; | ||
112 | // 3. Purge ITR for PAL code. | 104 | // 3. Purge ITR for PAL code. |
113 | GET_THIS_PADDR(r2, ia64_mca_pal_base) | 105 | GET_THIS_PADDR(r2, ia64_mca_pal_base) |
114 | ;; | 106 | ;; |
@@ -196,22 +188,6 @@ ia64_reload_tr: | |||
196 | srlz.i | 188 | srlz.i |
197 | srlz.d | 189 | srlz.d |
198 | ;; | 190 | ;; |
199 | // 2. Reload DTR register for PERCPU data. | ||
200 | GET_THIS_PADDR(r2, ia64_mca_per_cpu_pte) | ||
201 | ;; | ||
202 | movl r16=PERCPU_ADDR // vaddr | ||
203 | movl r18=PERCPU_PAGE_SHIFT<<2 | ||
204 | ;; | ||
205 | mov cr.itir=r18 | ||
206 | mov cr.ifa=r16 | ||
207 | ;; | ||
208 | ld8 r18=[r2] // load per-CPU PTE | ||
209 | mov r16=IA64_TR_PERCPU_DATA; | ||
210 | ;; | ||
211 | itr.d dtr[r16]=r18 | ||
212 | ;; | ||
213 | srlz.d | ||
214 | ;; | ||
215 | // 3. Reload ITR for PAL code. | 191 | // 3. Reload ITR for PAL code. |
216 | GET_THIS_PADDR(r2, ia64_mca_pal_pte) | 192 | GET_THIS_PADDR(r2, ia64_mca_pal_pte) |
217 | ;; | 193 | ;; |