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authorTony Luck <tony.luck@intel.com>2008-08-12 13:34:20 -0400
committerTony Luck <tony.luck@intel.com>2008-08-12 13:34:20 -0400
commit10617bbe84628eb18ab5f723d3ba35005adde143 (patch)
tree2d1dada5b7d8dd8cd060f54a597aaa34ccc8edb6 /arch/ia64/kernel/head.S
parent45fc3c4d9b7ab12798af43a73aea53eeecd16acf (diff)
[IA64] Ensure cpu0 can access per-cpu variables in early boot code
ia64 handles per-cpu variables a litle differently from other architectures in that it maps the physical memory allocated for each cpu at a constant virtual address (0xffffffffffff0000). This mapping is not enabled until the architecture specific cpu_init() function is run, which causes problems since some generic code is run before this point. In particular when CONFIG_PRINTK_TIME is enabled, the boot cpu will trap on the access to per-cpu memory at the first printk() call so the boot will fail without the kernel printing anything to the console. Fix this by allocating percpu memory for cpu0 in the kernel data section and doing all initialization to enable percpu access in head.S before calling any generic code. Other cpus must take care not to access per-cpu variables too early, but their code path from start_secondary() to cpu_init() is all in arch/ia64 Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/kernel/head.S')
-rw-r--r--arch/ia64/kernel/head.S26
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/ia64/kernel/head.S b/arch/ia64/kernel/head.S
index 41c712917ff7..8bdea8eb62e3 100644
--- a/arch/ia64/kernel/head.S
+++ b/arch/ia64/kernel/head.S
@@ -359,7 +359,31 @@ start_ap:
359 mov ar.rsc=0 // place RSE in enforced lazy mode 359 mov ar.rsc=0 // place RSE in enforced lazy mode
360 ;; 360 ;;
361 loadrs // clear the dirty partition 361 loadrs // clear the dirty partition
362 mov IA64_KR(PER_CPU_DATA)=r0 // clear physical per-CPU base 362 movl r19=__phys_per_cpu_start
363 mov r18=PERCPU_PAGE_SIZE
364 ;;
365#ifndef CONFIG_SMP
366 add r19=r19,r18
367 ;;
368#else
369(isAP) br.few 2f
370 mov r20=r19
371 sub r19=r19,r18
372 ;;
373 shr.u r18=r18,3
3741:
375 ld8 r21=[r20],8;;
376 st8[r19]=r21,8
377 adds r18=-1,r18;;
378 cmp4.lt p7,p6=0,r18
379(p7) br.cond.dptk.few 1b
3802:
381#endif
382 tpa r19=r19
383 ;;
384 .pred.rel.mutex isBP,isAP
385(isBP) mov IA64_KR(PER_CPU_DATA)=r19 // per-CPU base for cpu0
386(isAP) mov IA64_KR(PER_CPU_DATA)=r0 // clear physical per-CPU base
363 ;; 387 ;;
364 mov ar.bspstore=r2 // establish the new RSE stack 388 mov ar.bspstore=r2 // establish the new RSE stack
365 ;; 389 ;;