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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-07-22 01:44:28 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-07-27 15:10:38 -0400
commit9e1b32caa525cb236e80e9c671e179bcecccc657 (patch)
tree8a1f0abf5291b23047cfdf099d5cfc96cc9d9253 /arch/ia64/include/asm
parent4be3bd7849165e7efa6b0b35a23d6a3598d97465 (diff)
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb() Upcoming paches to support the new 64-bit "BookE" powerpc architecture will need to have the virtual address corresponding to PTE page when freeing it, due to the way the HW table walker works. Basically, the TLB can be loaded with "large" pages that cover the whole virtual space (well, sort-of, half of it actually) represented by a PTE page, and which contain an "indirect" bit indicating that this TLB entry RPN points to an array of PTEs from which the TLB can then create direct entries. Thus, in order to invalidate those when PTE pages are deleted, we need the virtual address to pass to tlbilx or tlbivax instructions. The old trick of sticking it somewhere in the PTE page struct page sucks too much, the address is almost readily available in all call sites and almost everybody implemets these as macros, so we may as well add the argument everywhere. I added it to the pmd and pud variants for consistency. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV] Acked-by: Nick Piggin <npiggin@suse.de> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/ia64/include/asm')
-rw-r--r--arch/ia64/include/asm/pgalloc.h6
-rw-r--r--arch/ia64/include/asm/tlb.h12
2 files changed, 9 insertions, 9 deletions
diff --git a/arch/ia64/include/asm/pgalloc.h b/arch/ia64/include/asm/pgalloc.h
index b9ac1a6fc216..96a8d927db28 100644
--- a/arch/ia64/include/asm/pgalloc.h
+++ b/arch/ia64/include/asm/pgalloc.h
@@ -48,7 +48,7 @@ static inline void pud_free(struct mm_struct *mm, pud_t *pud)
48{ 48{
49 quicklist_free(0, NULL, pud); 49 quicklist_free(0, NULL, pud);
50} 50}
51#define __pud_free_tlb(tlb, pud) pud_free((tlb)->mm, pud) 51#define __pud_free_tlb(tlb, pud, address) pud_free((tlb)->mm, pud)
52#endif /* CONFIG_PGTABLE_4 */ 52#endif /* CONFIG_PGTABLE_4 */
53 53
54static inline void 54static inline void
@@ -67,7 +67,7 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
67 quicklist_free(0, NULL, pmd); 67 quicklist_free(0, NULL, pmd);
68} 68}
69 69
70#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd) 70#define __pmd_free_tlb(tlb, pmd, address) pmd_free((tlb)->mm, pmd)
71 71
72static inline void 72static inline void
73pmd_populate(struct mm_struct *mm, pmd_t * pmd_entry, pgtable_t pte) 73pmd_populate(struct mm_struct *mm, pmd_t * pmd_entry, pgtable_t pte)
@@ -117,6 +117,6 @@ static inline void check_pgt_cache(void)
117 quicklist_trim(0, NULL, 25, 16); 117 quicklist_trim(0, NULL, 25, 16);
118} 118}
119 119
120#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte) 120#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte)
121 121
122#endif /* _ASM_IA64_PGALLOC_H */ 122#endif /* _ASM_IA64_PGALLOC_H */
diff --git a/arch/ia64/include/asm/tlb.h b/arch/ia64/include/asm/tlb.h
index 20d8a39680c2..85d965cb19a0 100644
--- a/arch/ia64/include/asm/tlb.h
+++ b/arch/ia64/include/asm/tlb.h
@@ -236,22 +236,22 @@ do { \
236 __tlb_remove_tlb_entry(tlb, ptep, addr); \ 236 __tlb_remove_tlb_entry(tlb, ptep, addr); \
237} while (0) 237} while (0)
238 238
239#define pte_free_tlb(tlb, ptep) \ 239#define pte_free_tlb(tlb, ptep, address) \
240do { \ 240do { \
241 tlb->need_flush = 1; \ 241 tlb->need_flush = 1; \
242 __pte_free_tlb(tlb, ptep); \ 242 __pte_free_tlb(tlb, ptep, address); \
243} while (0) 243} while (0)
244 244
245#define pmd_free_tlb(tlb, ptep) \ 245#define pmd_free_tlb(tlb, ptep, address) \
246do { \ 246do { \
247 tlb->need_flush = 1; \ 247 tlb->need_flush = 1; \
248 __pmd_free_tlb(tlb, ptep); \ 248 __pmd_free_tlb(tlb, ptep, address); \
249} while (0) 249} while (0)
250 250
251#define pud_free_tlb(tlb, pudp) \ 251#define pud_free_tlb(tlb, pudp, address) \
252do { \ 252do { \
253 tlb->need_flush = 1; \ 253 tlb->need_flush = 1; \
254 __pud_free_tlb(tlb, pudp); \ 254 __pud_free_tlb(tlb, pudp, address); \
255} while (0) 255} while (0)
256 256
257#endif /* _ASM_IA64_TLB_H */ 257#endif /* _ASM_IA64_TLB_H */