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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/ia64/ia32/ia32priv.h
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'arch/ia64/ia32/ia32priv.h')
-rw-r--r--arch/ia64/ia32/ia32priv.h544
1 files changed, 544 insertions, 0 deletions
diff --git a/arch/ia64/ia32/ia32priv.h b/arch/ia64/ia32/ia32priv.h
new file mode 100644
index 000000000000..b2de948bdaea
--- /dev/null
+++ b/arch/ia64/ia32/ia32priv.h
@@ -0,0 +1,544 @@
1#ifndef _ASM_IA64_IA32_PRIV_H
2#define _ASM_IA64_IA32_PRIV_H
3
4#include <linux/config.h>
5
6#include <asm/ia32.h>
7
8#ifdef CONFIG_IA32_SUPPORT
9
10#include <linux/binfmts.h>
11#include <linux/compat.h>
12#include <linux/rbtree.h>
13
14#include <asm/processor.h>
15
16/*
17 * 32 bit structures for IA32 support.
18 */
19
20#define IA32_PAGE_SIZE (1UL << IA32_PAGE_SHIFT)
21#define IA32_PAGE_MASK (~(IA32_PAGE_SIZE - 1))
22#define IA32_PAGE_ALIGN(addr) (((addr) + IA32_PAGE_SIZE - 1) & IA32_PAGE_MASK)
23#define IA32_CLOCKS_PER_SEC 100 /* Cast in stone for IA32 Linux */
24
25/*
26 * partially mapped pages provide precise accounting of which 4k sub pages
27 * are mapped and which ones are not, thereby improving IA-32 compatibility.
28 */
29struct partial_page {
30 struct partial_page *next; /* linked list, sorted by address */
31 struct rb_node pp_rb;
32 /* 64K is the largest "normal" page supported by ia64 ABI. So 4K*32
33 * should suffice.*/
34 unsigned int bitmap;
35 unsigned int base;
36};
37
38struct partial_page_list {
39 struct partial_page *pp_head; /* list head, points to the lowest
40 * addressed partial page */
41 struct rb_root ppl_rb;
42 struct partial_page *pp_hint; /* pp_hint->next is the last
43 * accessed partial page */
44 atomic_t pp_count; /* reference count */
45};
46
47#if PAGE_SHIFT > IA32_PAGE_SHIFT
48struct partial_page_list* ia32_init_pp_list (void);
49#else
50# define ia32_init_pp_list() 0
51#endif
52
53/* sigcontext.h */
54/*
55 * As documented in the iBCS2 standard..
56 *
57 * The first part of "struct _fpstate" is just the
58 * normal i387 hardware setup, the extra "status"
59 * word is used to save the coprocessor status word
60 * before entering the handler.
61 */
62struct _fpreg_ia32 {
63 unsigned short significand[4];
64 unsigned short exponent;
65};
66
67struct _fpxreg_ia32 {
68 unsigned short significand[4];
69 unsigned short exponent;
70 unsigned short padding[3];
71};
72
73struct _xmmreg_ia32 {
74 unsigned int element[4];
75};
76
77
78struct _fpstate_ia32 {
79 unsigned int cw,
80 sw,
81 tag,
82 ipoff,
83 cssel,
84 dataoff,
85 datasel;
86 struct _fpreg_ia32 _st[8];
87 unsigned short status;
88 unsigned short magic; /* 0xffff = regular FPU data only */
89
90 /* FXSR FPU environment */
91 unsigned int _fxsr_env[6]; /* FXSR FPU env is ignored */
92 unsigned int mxcsr;
93 unsigned int reserved;
94 struct _fpxreg_ia32 _fxsr_st[8]; /* FXSR FPU reg data is ignored */
95 struct _xmmreg_ia32 _xmm[8];
96 unsigned int padding[56];
97};
98
99struct sigcontext_ia32 {
100 unsigned short gs, __gsh;
101 unsigned short fs, __fsh;
102 unsigned short es, __esh;
103 unsigned short ds, __dsh;
104 unsigned int edi;
105 unsigned int esi;
106 unsigned int ebp;
107 unsigned int esp;
108 unsigned int ebx;
109 unsigned int edx;
110 unsigned int ecx;
111 unsigned int eax;
112 unsigned int trapno;
113 unsigned int err;
114 unsigned int eip;
115 unsigned short cs, __csh;
116 unsigned int eflags;
117 unsigned int esp_at_signal;
118 unsigned short ss, __ssh;
119 unsigned int fpstate; /* really (struct _fpstate_ia32 *) */
120 unsigned int oldmask;
121 unsigned int cr2;
122};
123
124/* user.h */
125/*
126 * IA32 (Pentium III/4) FXSR, SSE support
127 *
128 * Provide support for the GDB 5.0+ PTRACE_{GET|SET}FPXREGS requests for
129 * interacting with the FXSR-format floating point environment. Floating
130 * point data can be accessed in the regular format in the usual manner,
131 * and both the standard and SIMD floating point data can be accessed via
132 * the new ptrace requests. In either case, changes to the FPU environment
133 * will be reflected in the task's state as expected.
134 */
135struct ia32_user_i387_struct {
136 int cwd;
137 int swd;
138 int twd;
139 int fip;
140 int fcs;
141 int foo;
142 int fos;
143 /* 8*10 bytes for each FP-reg = 80 bytes */
144 struct _fpreg_ia32 st_space[8];
145};
146
147struct ia32_user_fxsr_struct {
148 unsigned short cwd;
149 unsigned short swd;
150 unsigned short twd;
151 unsigned short fop;
152 int fip;
153 int fcs;
154 int foo;
155 int fos;
156 int mxcsr;
157 int reserved;
158 int st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
159 int xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
160 int padding[56];
161};
162
163/* signal.h */
164#define IA32_SET_SA_HANDLER(ka,handler,restorer) \
165 ((ka)->sa.sa_handler = (__sighandler_t) \
166 (((unsigned long)(restorer) << 32) \
167 | ((handler) & 0xffffffff)))
168#define IA32_SA_HANDLER(ka) ((unsigned long) (ka)->sa.sa_handler & 0xffffffff)
169#define IA32_SA_RESTORER(ka) ((unsigned long) (ka)->sa.sa_handler >> 32)
170
171#define __IA32_NR_sigreturn 119
172#define __IA32_NR_rt_sigreturn 173
173
174struct sigaction32 {
175 unsigned int sa_handler; /* Really a pointer, but need to deal with 32 bits */
176 unsigned int sa_flags;
177 unsigned int sa_restorer; /* Another 32 bit pointer */
178 compat_sigset_t sa_mask; /* A 32 bit mask */
179};
180
181struct old_sigaction32 {
182 unsigned int sa_handler; /* Really a pointer, but need to deal
183 with 32 bits */
184 compat_old_sigset_t sa_mask; /* A 32 bit mask */
185 unsigned int sa_flags;
186 unsigned int sa_restorer; /* Another 32 bit pointer */
187};
188
189typedef struct sigaltstack_ia32 {
190 unsigned int ss_sp;
191 int ss_flags;
192 unsigned int ss_size;
193} stack_ia32_t;
194
195struct ucontext_ia32 {
196 unsigned int uc_flags;
197 unsigned int uc_link;
198 stack_ia32_t uc_stack;
199 struct sigcontext_ia32 uc_mcontext;
200 sigset_t uc_sigmask; /* mask last for extensibility */
201};
202
203struct stat64 {
204 unsigned long long st_dev;
205 unsigned char __pad0[4];
206 unsigned int __st_ino;
207 unsigned int st_mode;
208 unsigned int st_nlink;
209 unsigned int st_uid;
210 unsigned int st_gid;
211 unsigned long long st_rdev;
212 unsigned char __pad3[4];
213 unsigned int st_size_lo;
214 unsigned int st_size_hi;
215 unsigned int st_blksize;
216 unsigned int st_blocks; /* Number 512-byte blocks allocated. */
217 unsigned int __pad4; /* future possible st_blocks high bits */
218 unsigned int st_atime;
219 unsigned int st_atime_nsec;
220 unsigned int st_mtime;
221 unsigned int st_mtime_nsec;
222 unsigned int st_ctime;
223 unsigned int st_ctime_nsec;
224 unsigned int st_ino_lo;
225 unsigned int st_ino_hi;
226};
227
228typedef struct compat_siginfo {
229 int si_signo;
230 int si_errno;
231 int si_code;
232
233 union {
234 int _pad[((128/sizeof(int)) - 3)];
235
236 /* kill() */
237 struct {
238 unsigned int _pid; /* sender's pid */
239 unsigned int _uid; /* sender's uid */
240 } _kill;
241
242 /* POSIX.1b timers */
243 struct {
244 timer_t _tid; /* timer id */
245 int _overrun; /* overrun count */
246 char _pad[sizeof(unsigned int) - sizeof(int)];
247 compat_sigval_t _sigval; /* same as below */
248 int _sys_private; /* not to be passed to user */
249 } _timer;
250
251 /* POSIX.1b signals */
252 struct {
253 unsigned int _pid; /* sender's pid */
254 unsigned int _uid; /* sender's uid */
255 compat_sigval_t _sigval;
256 } _rt;
257
258 /* SIGCHLD */
259 struct {
260 unsigned int _pid; /* which child */
261 unsigned int _uid; /* sender's uid */
262 int _status; /* exit code */
263 compat_clock_t _utime;
264 compat_clock_t _stime;
265 } _sigchld;
266
267 /* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
268 struct {
269 unsigned int _addr; /* faulting insn/memory ref. */
270 } _sigfault;
271
272 /* SIGPOLL */
273 struct {
274 int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
275 int _fd;
276 } _sigpoll;
277 } _sifields;
278} compat_siginfo_t;
279
280struct old_linux32_dirent {
281 u32 d_ino;
282 u32 d_offset;
283 u16 d_namlen;
284 char d_name[1];
285};
286
287/*
288 * IA-32 ELF specific definitions for IA-64.
289 */
290
291#define _ASM_IA64_ELF_H /* Don't include elf.h */
292
293#include <linux/sched.h>
294#include <asm/processor.h>
295
296/*
297 * This is used to ensure we don't load something for the wrong architecture.
298 */
299#define elf_check_arch(x) ((x)->e_machine == EM_386)
300
301/*
302 * These are used to set parameters in the core dumps.
303 */
304#define ELF_CLASS ELFCLASS32
305#define ELF_DATA ELFDATA2LSB
306#define ELF_ARCH EM_386
307
308#define IA32_PAGE_OFFSET 0xc0000000
309#define IA32_STACK_TOP IA32_PAGE_OFFSET
310#define IA32_GATE_OFFSET IA32_PAGE_OFFSET
311#define IA32_GATE_END IA32_PAGE_OFFSET + PAGE_SIZE
312
313/*
314 * The system segments (GDT, TSS, LDT) have to be mapped below 4GB so the IA-32 engine can
315 * access them.
316 */
317#define IA32_GDT_OFFSET (IA32_PAGE_OFFSET + PAGE_SIZE)
318#define IA32_TSS_OFFSET (IA32_PAGE_OFFSET + 2*PAGE_SIZE)
319#define IA32_LDT_OFFSET (IA32_PAGE_OFFSET + 3*PAGE_SIZE)
320
321#define ELF_EXEC_PAGESIZE IA32_PAGE_SIZE
322
323/*
324 * This is the location that an ET_DYN program is loaded if exec'ed.
325 * Typical use of this is to invoke "./ld.so someprog" to test out a
326 * new version of the loader. We need to make sure that it is out of
327 * the way of the program that it will "exec", and that there is
328 * sufficient room for the brk.
329 */
330#define ELF_ET_DYN_BASE (IA32_PAGE_OFFSET/3 + 0x1000000)
331
332void ia64_elf32_init(struct pt_regs *regs);
333#define ELF_PLAT_INIT(_r, load_addr) ia64_elf32_init(_r)
334
335#define elf_addr_t u32
336
337/* This macro yields a bitmask that programs can use to figure out
338 what instruction set this CPU supports. */
339#define ELF_HWCAP 0
340
341/* This macro yields a string that ld.so will use to load
342 implementation specific libraries for optimization. Not terribly
343 relevant until we have real hardware to play with... */
344#define ELF_PLATFORM NULL
345
346#ifdef __KERNEL__
347# define SET_PERSONALITY(EX,IBCS2) \
348 (current->personality = (IBCS2) ? PER_SVR4 : PER_LINUX)
349#endif
350
351#define IA32_EFLAG 0x200
352
353/*
354 * IA-32 ELF specific definitions for IA-64.
355 */
356
357#define __USER_CS 0x23
358#define __USER_DS 0x2B
359
360/*
361 * The per-cpu GDT has 32 entries: see <asm-i386/segment.h>
362 */
363#define GDT_ENTRIES 32
364
365#define GDT_SIZE (GDT_ENTRIES * 8)
366
367#define TSS_ENTRY 14
368#define LDT_ENTRY (TSS_ENTRY + 1)
369
370#define IA32_SEGSEL_RPL (0x3 << 0)
371#define IA32_SEGSEL_TI (0x1 << 2)
372#define IA32_SEGSEL_INDEX_SHIFT 3
373
374#define _TSS ((unsigned long) TSS_ENTRY << IA32_SEGSEL_INDEX_SHIFT)
375#define _LDT ((unsigned long) LDT_ENTRY << IA32_SEGSEL_INDEX_SHIFT)
376
377#define IA32_SEG_BASE 16
378#define IA32_SEG_TYPE 40
379#define IA32_SEG_SYS 44
380#define IA32_SEG_DPL 45
381#define IA32_SEG_P 47
382#define IA32_SEG_HIGH_LIMIT 48
383#define IA32_SEG_AVL 52
384#define IA32_SEG_DB 54
385#define IA32_SEG_G 55
386#define IA32_SEG_HIGH_BASE 56
387
388#define IA32_SEG_DESCRIPTOR(base, limit, segtype, nonsysseg, dpl, segpresent, avl, segdb, gran) \
389 (((limit) & 0xffff) \
390 | (((unsigned long) (base) & 0xffffff) << IA32_SEG_BASE) \
391 | ((unsigned long) (segtype) << IA32_SEG_TYPE) \
392 | ((unsigned long) (nonsysseg) << IA32_SEG_SYS) \
393 | ((unsigned long) (dpl) << IA32_SEG_DPL) \
394 | ((unsigned long) (segpresent) << IA32_SEG_P) \
395 | ((((unsigned long) (limit) >> 16) & 0xf) << IA32_SEG_HIGH_LIMIT) \
396 | ((unsigned long) (avl) << IA32_SEG_AVL) \
397 | ((unsigned long) (segdb) << IA32_SEG_DB) \
398 | ((unsigned long) (gran) << IA32_SEG_G) \
399 | ((((unsigned long) (base) >> 24) & 0xff) << IA32_SEG_HIGH_BASE))
400
401#define SEG_LIM 32
402#define SEG_TYPE 52
403#define SEG_SYS 56
404#define SEG_DPL 57
405#define SEG_P 59
406#define SEG_AVL 60
407#define SEG_DB 62
408#define SEG_G 63
409
410/* Unscramble an IA-32 segment descriptor into the IA-64 format. */
411#define IA32_SEG_UNSCRAMBLE(sd) \
412 ( (((sd) >> IA32_SEG_BASE) & 0xffffff) | ((((sd) >> IA32_SEG_HIGH_BASE) & 0xff) << 24) \
413 | ((((sd) & 0xffff) | ((((sd) >> IA32_SEG_HIGH_LIMIT) & 0xf) << 16)) << SEG_LIM) \
414 | ((((sd) >> IA32_SEG_TYPE) & 0xf) << SEG_TYPE) \
415 | ((((sd) >> IA32_SEG_SYS) & 0x1) << SEG_SYS) \
416 | ((((sd) >> IA32_SEG_DPL) & 0x3) << SEG_DPL) \
417 | ((((sd) >> IA32_SEG_P) & 0x1) << SEG_P) \
418 | ((((sd) >> IA32_SEG_AVL) & 0x1) << SEG_AVL) \
419 | ((((sd) >> IA32_SEG_DB) & 0x1) << SEG_DB) \
420 | ((((sd) >> IA32_SEG_G) & 0x1) << SEG_G))
421
422#define IA32_IOBASE 0x2000000000000000UL /* Virtual address for I/O space */
423
424#define IA32_CR0 0x80000001 /* Enable PG and PE bits */
425#define IA32_CR4 0x600 /* MMXEX and FXSR on */
426
427/*
428 * IA32 floating point control registers starting values
429 */
430
431#define IA32_FSR_DEFAULT 0x55550000 /* set all tag bits */
432#define IA32_FCR_DEFAULT 0x17800000037fUL /* extended precision, all masks */
433
434#define IA32_PTRACE_GETREGS 12
435#define IA32_PTRACE_SETREGS 13
436#define IA32_PTRACE_GETFPREGS 14
437#define IA32_PTRACE_SETFPREGS 15
438#define IA32_PTRACE_GETFPXREGS 18
439#define IA32_PTRACE_SETFPXREGS 19
440
441#define ia32_start_thread(regs,new_ip,new_sp) do { \
442 set_fs(USER_DS); \
443 ia64_psr(regs)->cpl = 3; /* set user mode */ \
444 ia64_psr(regs)->ri = 0; /* clear return slot number */ \
445 ia64_psr(regs)->is = 1; /* IA-32 instruction set */ \
446 regs->cr_iip = new_ip; \
447 regs->ar_rsc = 0xc; /* enforced lazy mode, priv. level 3 */ \
448 regs->ar_rnat = 0; \
449 regs->loadrs = 0; \
450 regs->r12 = new_sp; \
451} while (0)
452
453/*
454 * Local Descriptor Table (LDT) related declarations.
455 */
456
457#define IA32_LDT_ENTRIES 8192 /* Maximum number of LDT entries supported. */
458#define IA32_LDT_ENTRY_SIZE 8 /* The size of each LDT entry. */
459
460#define LDT_entry_a(info) \
461 ((((info)->base_addr & 0x0000ffff) << 16) | ((info)->limit & 0x0ffff))
462
463#define LDT_entry_b(info) \
464 (((info)->base_addr & 0xff000000) | \
465 (((info)->base_addr & 0x00ff0000) >> 16) | \
466 ((info)->limit & 0xf0000) | \
467 (((info)->read_exec_only ^ 1) << 9) | \
468 ((info)->contents << 10) | \
469 (((info)->seg_not_present ^ 1) << 15) | \
470 ((info)->seg_32bit << 22) | \
471 ((info)->limit_in_pages << 23) | \
472 ((info)->useable << 20) | \
473 0x7100)
474
475#define LDT_empty(info) ( \
476 (info)->base_addr == 0 && \
477 (info)->limit == 0 && \
478 (info)->contents == 0 && \
479 (info)->read_exec_only == 1 && \
480 (info)->seg_32bit == 0 && \
481 (info)->limit_in_pages == 0 && \
482 (info)->seg_not_present == 1 && \
483 (info)->useable == 0 )
484
485static inline void
486load_TLS (struct thread_struct *t, unsigned int cpu)
487{
488 extern unsigned long *cpu_gdt_table[NR_CPUS];
489
490 memcpy(cpu_gdt_table[cpu] + GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0], sizeof(long));
491 memcpy(cpu_gdt_table[cpu] + GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1], sizeof(long));
492 memcpy(cpu_gdt_table[cpu] + GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2], sizeof(long));
493}
494
495struct ia32_user_desc {
496 unsigned int entry_number;
497 unsigned int base_addr;
498 unsigned int limit;
499 unsigned int seg_32bit:1;
500 unsigned int contents:2;
501 unsigned int read_exec_only:1;
502 unsigned int limit_in_pages:1;
503 unsigned int seg_not_present:1;
504 unsigned int useable:1;
505};
506
507struct linux_binprm;
508
509extern void ia32_init_addr_space (struct pt_regs *regs);
510extern int ia32_setup_arg_pages (struct linux_binprm *bprm, int exec_stack);
511extern unsigned long ia32_do_mmap (struct file *, unsigned long, unsigned long, int, int, loff_t);
512extern void ia32_load_segment_descriptors (struct task_struct *task);
513
514#define ia32f2ia64f(dst,src) \
515do { \
516 ia64_ldfe(6,src); \
517 ia64_stop(); \
518 ia64_stf_spill(dst, 6); \
519} while(0)
520
521#define ia64f2ia32f(dst,src) \
522do { \
523 ia64_ldf_fill(6, src); \
524 ia64_stop(); \
525 ia64_stfe(dst, 6); \
526} while(0)
527
528struct user_regs_struct32 {
529 __u32 ebx, ecx, edx, esi, edi, ebp, eax;
530 unsigned short ds, __ds, es, __es;
531 unsigned short fs, __fs, gs, __gs;
532 __u32 orig_eax, eip;
533 unsigned short cs, __cs;
534 __u32 eflags, esp;
535 unsigned short ss, __ss;
536};
537
538/* Prototypes for use in elfcore32.h */
539extern int save_ia32_fpstate (struct task_struct *, struct ia32_user_i387_struct __user *);
540extern int save_ia32_fpxstate (struct task_struct *, struct ia32_user_fxsr_struct __user *);
541
542#endif /* !CONFIG_IA32_SUPPORT */
543
544#endif /* _ASM_IA64_IA32_PRIV_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-14 04:26:17 -0500