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authorHarvey Harrison <harvey.harrison@gmail.com>2008-03-04 18:15:00 -0500
committerTony Luck <tony.luck@intel.com>2008-03-06 12:19:27 -0500
commitd4ed80841ad4a1d59decccfbe2d010558568c5fb (patch)
tree81ebf4a87688f4b0cc46f74266b5b0cac76932b0 /arch/ia64/hp
parent2d9b06c72a9f2e6042d72df7d9000a48bcba34f0 (diff)
[IA64] remove remaining __FUNCTION__ occurrences
__FUNCTION__ is gcc-specific, use __func__ Long lines have been kept where they exist, some small spacing changes have been done. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/hp')
-rw-r--r--arch/ia64/hp/common/hwsw_iommu.c2
-rw-r--r--arch/ia64/hp/common/sba_iommu.c36
-rw-r--r--arch/ia64/hp/sim/simeth.c2
-rw-r--r--arch/ia64/hp/sim/simserial.c2
4 files changed, 20 insertions, 22 deletions
diff --git a/arch/ia64/hp/common/hwsw_iommu.c b/arch/ia64/hp/common/hwsw_iommu.c
index 94e57109fad6..8f6bcfe1dada 100644
--- a/arch/ia64/hp/common/hwsw_iommu.c
+++ b/arch/ia64/hp/common/hwsw_iommu.c
@@ -71,7 +71,7 @@ hwsw_init (void)
71#ifdef CONFIG_IA64_GENERIC 71#ifdef CONFIG_IA64_GENERIC
72 /* Better to have normal DMA than panic */ 72 /* Better to have normal DMA than panic */
73 printk(KERN_WARNING "%s: Failed to initialize software I/O TLB," 73 printk(KERN_WARNING "%s: Failed to initialize software I/O TLB,"
74 " reverting to hpzx1 platform vector\n", __FUNCTION__); 74 " reverting to hpzx1 platform vector\n", __func__);
75 machvec_init("hpzx1"); 75 machvec_init("hpzx1");
76#else 76#else
77 panic("Unable to initialize software I/O TLB services"); 77 panic("Unable to initialize software I/O TLB services");
diff --git a/arch/ia64/hp/common/sba_iommu.c b/arch/ia64/hp/common/sba_iommu.c
index a94445422cc6..523eae6d3e49 100644
--- a/arch/ia64/hp/common/sba_iommu.c
+++ b/arch/ia64/hp/common/sba_iommu.c
@@ -529,7 +529,7 @@ sba_search_bitmap(struct ioc *ioc, unsigned long bits_wanted, int use_hint)
529 base_mask = RESMAP_MASK(bits_wanted); 529 base_mask = RESMAP_MASK(bits_wanted);
530 mask = base_mask << bitshiftcnt; 530 mask = base_mask << bitshiftcnt;
531 531
532 DBG_RES("%s() o %ld %p", __FUNCTION__, o, res_ptr); 532 DBG_RES("%s() o %ld %p", __func__, o, res_ptr);
533 for(; res_ptr < res_end ; res_ptr++) 533 for(; res_ptr < res_end ; res_ptr++)
534 { 534 {
535 DBG_RES(" %p %lx %lx\n", res_ptr, mask, *res_ptr); 535 DBG_RES(" %p %lx %lx\n", res_ptr, mask, *res_ptr);
@@ -679,7 +679,7 @@ sba_alloc_range(struct ioc *ioc, size_t size)
679#endif 679#endif
680 680
681 DBG_RES("%s(%x) %d -> %lx hint %x/%x\n", 681 DBG_RES("%s(%x) %d -> %lx hint %x/%x\n",
682 __FUNCTION__, size, pages_needed, pide, 682 __func__, size, pages_needed, pide,
683 (uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map), 683 (uint) ((unsigned long) ioc->res_hint - (unsigned long) ioc->res_map),
684 ioc->res_bitshift ); 684 ioc->res_bitshift );
685 685
@@ -722,8 +722,8 @@ sba_free_range(struct ioc *ioc, dma_addr_t iova, size_t size)
722 m = RESMAP_MASK(bits_not_wanted) << (pide & (BITS_PER_LONG - 1)); 722 m = RESMAP_MASK(bits_not_wanted) << (pide & (BITS_PER_LONG - 1));
723 bits_not_wanted = 0; 723 bits_not_wanted = 0;
724 724
725 DBG_RES("%s( ,%x,%x) %x/%lx %x %p %lx\n", __FUNCTION__, (uint) iova, size, 725 DBG_RES("%s( ,%x,%x) %x/%lx %x %p %lx\n", __func__, (uint) iova, size,
726 bits_not_wanted, m, pide, res_ptr, *res_ptr); 726 bits_not_wanted, m, pide, res_ptr, *res_ptr);
727 727
728 ASSERT(m != 0); 728 ASSERT(m != 0);
729 ASSERT(bits_not_wanted); 729 ASSERT(bits_not_wanted);
@@ -940,8 +940,7 @@ sba_map_single(struct device *dev, void *addr, size_t size, int dir)
940 940
941 iovp = (dma_addr_t) pide << iovp_shift; 941 iovp = (dma_addr_t) pide << iovp_shift;
942 942
943 DBG_RUN("%s() 0x%p -> 0x%lx\n", 943 DBG_RUN("%s() 0x%p -> 0x%lx\n", __func__, addr, (long) iovp | offset);
944 __FUNCTION__, addr, (long) iovp | offset);
945 944
946 pdir_start = &(ioc->pdir_base[pide]); 945 pdir_start = &(ioc->pdir_base[pide]);
947 946
@@ -1029,8 +1028,7 @@ void sba_unmap_single(struct device *dev, dma_addr_t iova, size_t size, int dir)
1029#endif 1028#endif
1030 offset = iova & ~iovp_mask; 1029 offset = iova & ~iovp_mask;
1031 1030
1032 DBG_RUN("%s() iovp 0x%lx/%x\n", 1031 DBG_RUN("%s() iovp 0x%lx/%x\n", __func__, (long) iova, size);
1033 __FUNCTION__, (long) iova, size);
1034 1032
1035 iova ^= offset; /* clear offset bits */ 1033 iova ^= offset; /* clear offset bits */
1036 size += offset; 1034 size += offset;
@@ -1404,7 +1402,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
1404 struct scatterlist *sg; 1402 struct scatterlist *sg;
1405#endif 1403#endif
1406 1404
1407 DBG_RUN_SG("%s() START %d entries\n", __FUNCTION__, nents); 1405 DBG_RUN_SG("%s() START %d entries\n", __func__, nents);
1408 ioc = GET_IOC(dev); 1406 ioc = GET_IOC(dev);
1409 ASSERT(ioc); 1407 ASSERT(ioc);
1410 1408
@@ -1468,7 +1466,7 @@ int sba_map_sg(struct device *dev, struct scatterlist *sglist, int nents, int di
1468#endif 1466#endif
1469 1467
1470 ASSERT(coalesced == filled); 1468 ASSERT(coalesced == filled);
1471 DBG_RUN_SG("%s() DONE %d mappings\n", __FUNCTION__, filled); 1469 DBG_RUN_SG("%s() DONE %d mappings\n", __func__, filled);
1472 1470
1473 return filled; 1471 return filled;
1474} 1472}
@@ -1491,7 +1489,7 @@ void sba_unmap_sg (struct device *dev, struct scatterlist *sglist, int nents, in
1491#endif 1489#endif
1492 1490
1493 DBG_RUN_SG("%s() START %d entries, %p,%x\n", 1491 DBG_RUN_SG("%s() START %d entries, %p,%x\n",
1494 __FUNCTION__, nents, sba_sg_address(sglist), sglist->length); 1492 __func__, nents, sba_sg_address(sglist), sglist->length);
1495 1493
1496#ifdef ASSERT_PDIR_SANITY 1494#ifdef ASSERT_PDIR_SANITY
1497 ioc = GET_IOC(dev); 1495 ioc = GET_IOC(dev);
@@ -1509,7 +1507,7 @@ void sba_unmap_sg (struct device *dev, struct scatterlist *sglist, int nents, in
1509 nents--; 1507 nents--;
1510 } 1508 }
1511 1509
1512 DBG_RUN_SG("%s() DONE (nents %d)\n", __FUNCTION__, nents); 1510 DBG_RUN_SG("%s() DONE (nents %d)\n", __func__, nents);
1513 1511
1514#ifdef ASSERT_PDIR_SANITY 1512#ifdef ASSERT_PDIR_SANITY
1515 spin_lock_irqsave(&ioc->res_lock, flags); 1513 spin_lock_irqsave(&ioc->res_lock, flags);
@@ -1546,7 +1544,7 @@ ioc_iova_init(struct ioc *ioc)
1546 ioc->iov_size = ~ioc->imask + 1; 1544 ioc->iov_size = ~ioc->imask + 1;
1547 1545
1548 DBG_INIT("%s() hpa %p IOV base 0x%lx mask 0x%lx (%dMB)\n", 1546 DBG_INIT("%s() hpa %p IOV base 0x%lx mask 0x%lx (%dMB)\n",
1549 __FUNCTION__, ioc->ioc_hpa, ioc->ibase, ioc->imask, 1547 __func__, ioc->ioc_hpa, ioc->ibase, ioc->imask,
1550 ioc->iov_size >> 20); 1548 ioc->iov_size >> 20);
1551 1549
1552 switch (iovp_size) { 1550 switch (iovp_size) {
@@ -1569,7 +1567,7 @@ ioc_iova_init(struct ioc *ioc)
1569 1567
1570 memset(ioc->pdir_base, 0, ioc->pdir_size); 1568 memset(ioc->pdir_base, 0, ioc->pdir_size);
1571 1569
1572 DBG_INIT("%s() IOV page size %ldK pdir %p size %x\n", __FUNCTION__, 1570 DBG_INIT("%s() IOV page size %ldK pdir %p size %x\n", __func__,
1573 iovp_size >> 10, ioc->pdir_base, ioc->pdir_size); 1571 iovp_size >> 10, ioc->pdir_base, ioc->pdir_size);
1574 1572
1575 ASSERT(ALIGN((unsigned long) ioc->pdir_base, 4*1024) == (unsigned long) ioc->pdir_base); 1573 ASSERT(ALIGN((unsigned long) ioc->pdir_base, 4*1024) == (unsigned long) ioc->pdir_base);
@@ -1612,7 +1610,7 @@ ioc_iova_init(struct ioc *ioc)
1612 1610
1613 prefetch_spill_page = virt_to_phys(addr); 1611 prefetch_spill_page = virt_to_phys(addr);
1614 1612
1615 DBG_INIT("%s() prefetch spill addr: 0x%lx\n", __FUNCTION__, prefetch_spill_page); 1613 DBG_INIT("%s() prefetch spill addr: 0x%lx\n", __func__, prefetch_spill_page);
1616 } 1614 }
1617 /* 1615 /*
1618 ** Set all the PDIR entries valid w/ the spill page as the target 1616 ** Set all the PDIR entries valid w/ the spill page as the target
@@ -1641,7 +1639,7 @@ ioc_resource_init(struct ioc *ioc)
1641 /* resource map size dictated by pdir_size */ 1639 /* resource map size dictated by pdir_size */
1642 ioc->res_size = ioc->pdir_size / PDIR_ENTRY_SIZE; /* entries */ 1640 ioc->res_size = ioc->pdir_size / PDIR_ENTRY_SIZE; /* entries */
1643 ioc->res_size >>= 3; /* convert bit count to byte count */ 1641 ioc->res_size >>= 3; /* convert bit count to byte count */
1644 DBG_INIT("%s() res_size 0x%x\n", __FUNCTION__, ioc->res_size); 1642 DBG_INIT("%s() res_size 0x%x\n", __func__, ioc->res_size);
1645 1643
1646 ioc->res_map = (char *) __get_free_pages(GFP_KERNEL, 1644 ioc->res_map = (char *) __get_free_pages(GFP_KERNEL,
1647 get_order(ioc->res_size)); 1645 get_order(ioc->res_size));
@@ -1664,7 +1662,7 @@ ioc_resource_init(struct ioc *ioc)
1664 | prefetch_spill_page); 1662 | prefetch_spill_page);
1665#endif 1663#endif
1666 1664
1667 DBG_INIT("%s() res_map %x %p\n", __FUNCTION__, 1665 DBG_INIT("%s() res_map %x %p\n", __func__,
1668 ioc->res_size, (void *) ioc->res_map); 1666 ioc->res_size, (void *) ioc->res_map);
1669} 1667}
1670 1668
@@ -1767,7 +1765,7 @@ ioc_init(u64 hpa, void *handle)
1767 iovp_size = (1 << iovp_shift); 1765 iovp_size = (1 << iovp_shift);
1768 iovp_mask = ~(iovp_size - 1); 1766 iovp_mask = ~(iovp_size - 1);
1769 1767
1770 DBG_INIT("%s: PAGE_SIZE %ldK, iovp_size %ldK\n", __FUNCTION__, 1768 DBG_INIT("%s: PAGE_SIZE %ldK, iovp_size %ldK\n", __func__,
1771 PAGE_SIZE >> 10, iovp_size >> 10); 1769 PAGE_SIZE >> 10, iovp_size >> 10);
1772 1770
1773 if (!ioc->name) { 1771 if (!ioc->name) {
@@ -2137,7 +2135,7 @@ sba_page_override(char *str)
2137 break; 2135 break;
2138 default: 2136 default:
2139 printk("%s: unknown/unsupported iommu page size %ld\n", 2137 printk("%s: unknown/unsupported iommu page size %ld\n",
2140 __FUNCTION__, page_size); 2138 __func__, page_size);
2141 } 2139 }
2142 2140
2143 return 1; 2141 return 1;
diff --git a/arch/ia64/hp/sim/simeth.c b/arch/ia64/hp/sim/simeth.c
index 9898febf609a..969fe9f443c4 100644
--- a/arch/ia64/hp/sim/simeth.c
+++ b/arch/ia64/hp/sim/simeth.c
@@ -222,7 +222,7 @@ simeth_probe1(void)
222 } 222 }
223 223
224 if ((rc = assign_irq_vector(AUTO_ASSIGN)) < 0) 224 if ((rc = assign_irq_vector(AUTO_ASSIGN)) < 0)
225 panic("%s: out of interrupt vectors!\n", __FUNCTION__); 225 panic("%s: out of interrupt vectors!\n", __func__);
226 dev->irq = rc; 226 dev->irq = rc;
227 227
228 /* 228 /*
diff --git a/arch/ia64/hp/sim/simserial.c b/arch/ia64/hp/sim/simserial.c
index ef252df50e1e..eb0c32a85fd7 100644
--- a/arch/ia64/hp/sim/simserial.c
+++ b/arch/ia64/hp/sim/simserial.c
@@ -1000,7 +1000,7 @@ simrs_init (void)
1000 if (!state->irq) { 1000 if (!state->irq) {
1001 if ((rc = assign_irq_vector(AUTO_ASSIGN)) < 0) 1001 if ((rc = assign_irq_vector(AUTO_ASSIGN)) < 0)
1002 panic("%s: out of interrupt vectors!\n", 1002 panic("%s: out of interrupt vectors!\n",
1003 __FUNCTION__); 1003 __func__);
1004 state->irq = rc; 1004 state->irq = rc;
1005 ia64_ssc_connect_irq(KEYBOARD_INTR, state->irq); 1005 ia64_ssc_connect_irq(KEYBOARD_INTR, state->irq);
1006 } 1006 }