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authorAndreas Mohr <andi@rhlx01.fht-esslingen.de>2006-06-23 05:04:26 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-06-23 10:42:57 -0400
commitcefc01130ba2bb0a81abda14b3f00fcc2e70dd43 (patch)
tree392da803d2da3804ca0359ffb6a4763d0decd7d2 /arch/i386
parentacae9d32436122959667470b84da517d7b1b9c2d (diff)
[PATCH] x86: cyrix code CONFIG_PCI fix / add __initdata
PCI code was outside of CONFIG_PCI, add __initdata at cyrix_55x0 (since accessed within __init function only). Signed-off-by: Andreas Mohr <andi@lisas.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386')
-rw-r--r--arch/i386/kernel/cpu/cyrix.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index 00f2e058797c..fc32c8028e24 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -184,7 +184,7 @@ static void __init geode_configure(void)
184 184
185 185
186#ifdef CONFIG_PCI 186#ifdef CONFIG_PCI
187static struct pci_device_id cyrix_55x0[] = { 187static struct pci_device_id __initdata cyrix_55x0[] = {
188 { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510) }, 188 { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5510) },
189 { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520) }, 189 { PCI_DEVICE(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_5520) },
190 { }, 190 { },
@@ -272,14 +272,15 @@ static void __init init_cyrix(struct cpuinfo_x86 *c)
272 272
273 printk(KERN_INFO "Working around Cyrix MediaGX virtual DMA bugs.\n"); 273 printk(KERN_INFO "Working around Cyrix MediaGX virtual DMA bugs.\n");
274 isa_dma_bridge_buggy = 2; 274 isa_dma_bridge_buggy = 2;
275#endif 275
276 c->x86_cache_size=16; /* Yep 16K integrated cache thats it */ 276
277
278 /* 277 /*
279 * The 5510/5520 companion chips have a funky PIT. 278 * The 5510/5520 companion chips have a funky PIT.
280 */ 279 */
281 if (pci_dev_present(cyrix_55x0)) 280 if (pci_dev_present(cyrix_55x0))
282 pit_latch_buggy = 1; 281 pit_latch_buggy = 1;
282#endif
283 c->x86_cache_size=16; /* Yep 16K integrated cache thats it */
283 284
284 /* GXm supports extended cpuid levels 'ala' AMD */ 285 /* GXm supports extended cpuid levels 'ala' AMD */
285 if (c->cpuid_level == 2) { 286 if (c->cpuid_level == 2) {