Unify the CPU features vectors between i386 and x86-64

Unify the handling of the CPU features vectors between i386 and x86-64.
This also adopts the collapsing of features which are required at
compile-time into constant tests from x86-64 to i386.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

2 files changed, 15 insertions, 12 deletions

diff --git a/arch/i386/kernel/cpu/proc.c b/arch/i386/kernel/cpu/proc.c
index 89d91e6cc972..ed73091d3dd0 100644
--- a/arch/i386/kernel/cpu/proc.c
+++ b/arch/i386/kernel/cpu/proc.c
@@ -29,7 +29,8 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, "mp", "nx", NULL, "mmxext", NULL,
-                NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm", "3dnowext", "3dnow",
+                NULL, "fxsr_opt", "pdpe1gb", "rdtscp", NULL, "lm",
+                "3dnowext", "3dnow",
 
                 /* Transmeta-defined */
                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
@@ -40,8 +41,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 /* Other (Linux-defined) */
                 "cxmmx", "k6_mtrr", "cyrix_arr", "centaur_mcr",
                 NULL, NULL, NULL, NULL,
-                "constant_tsc", "up", NULL, NULL, NULL, NULL, NULL, NULL,
-                NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
+                "constant_tsc", "up", NULL, "arch_perfmon",
+                "pebs", "bts", NULL, "sync_rdtsc",
+                "rep_good", NULL, NULL, NULL, NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 
                 /* Intel-defined (#2) */
@@ -57,9 +59,10 @@ static int show_cpuinfo(struct seq_file *m, void *v)
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
 
                 /* AMD-defined (#2) */
-                "lahf_lm", "cmp_legacy", "svm", "extapic", "cr8legacy", "abm",
-                "sse4a", "misalignsse",
-                "3dnowprefetch", "osvw", "ibs", NULL, NULL, NULL, NULL, NULL,
+                "lahf_lm", "cmp_legacy", "svm", "extapic", "cr8_legacy",
+                "altmovcr8", "abm", "sse4a",
+                "misalignsse", "3dnowprefetch",
+                "osvw", "ibs", NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
         };
diff --git a/arch/i386/kernel/verify_cpu.S b/arch/i386/kernel/verify_cpu.S
index f1d1eacf4ab0..3efc5c137d14 100644
--- a/arch/i386/kernel/verify_cpu.S
+++ b/arch/i386/kernel/verify_cpu.S
@@ -20,7 +20,7 @@ verify_cpu:
         testl   $(1<<18),%eax
         jz      bad
 #endif
-#if REQUIRED_MASK1 != 0
+#if REQUIRED_MASK0 != 0
         pushfl                          # standard way to check for cpuid
         popl    %eax
         movl    %eax,%ebx
@@ -39,14 +39,14 @@ verify_cpu:
         pushfl
         popl    %eax
         cmpl    %eax,%ebx
-        jz      bad                     # REQUIRED_MASK1 != 0 requires CPUID
+        jz      bad                     # REQUIRED_MASK0 != 0 requires CPUID
 
         movl    $0x0,%eax               # See if cpuid 1 is implemented
         cpuid
         cmpl    $0x1,%eax
         jb      bad                     # no cpuid 1
 
-#if REQUIRED_MASK1 & NEED_CMPXCHG64
+#if REQUIRED_MASK0 & NEED_CMPXCHG64
         /* Some VIA C3s need magic MSRs to enable CX64. Do this here */
         cmpl    $0x746e6543,%ebx        # Cent
         jne     1f
@@ -79,10 +79,10 @@ verify_cpu:
 #error  add proper model checking here
 #endif
 
-        andl    $REQUIRED_MASK1,%edx
-        xorl    $REQUIRED_MASK1,%edx
+        andl    $REQUIRED_MASK0,%edx
+        xorl    $REQUIRED_MASK0,%edx
         jnz     bad
-#endif /* REQUIRED_MASK1 */
+#endif /* REQUIRED_MASK0 */
 
         popfl
         xor     %eax,%eax