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authorVenki Pallipadi <venkatesh.pallipadi@intel.com>2007-05-23 18:42:13 -0400
committerDave Jones <davej@redhat.com>2007-05-29 16:56:40 -0400
commit13424f6514f6444554a103362dd9d31eabbbdc54 (patch)
tree158cc4af6254e7c707b508376f179ca971237597 /arch/i386
parent0a4b2ccc555fa2ca6873d60219047104e4805d45 (diff)
[CPUFREQ] acpi-cpufreq: Proper ReadModifyWrite of PERF_CTL MSR
During recent acpi-cpufreq changes, writing to PERF_CTL msr changed from RMW of entire 64 bit to RMW of low 32 bit and clearing of upper 32 bit. Fix it back to do a proper RMW of the MSR. Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com> Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'arch/i386')
-rw-r--r--arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c13
1 files changed, 5 insertions, 8 deletions
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
index 10baa3501ed3..18c8b67ea3a7 100644
--- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -167,11 +167,13 @@ static void do_drv_read(struct drv_cmd *cmd)
167 167
168static void do_drv_write(struct drv_cmd *cmd) 168static void do_drv_write(struct drv_cmd *cmd)
169{ 169{
170 u32 h = 0; 170 u32 lo, hi;
171 171
172 switch (cmd->type) { 172 switch (cmd->type) {
173 case SYSTEM_INTEL_MSR_CAPABLE: 173 case SYSTEM_INTEL_MSR_CAPABLE:
174 wrmsr(cmd->addr.msr.reg, cmd->val, h); 174 rdmsr(cmd->addr.msr.reg, lo, hi);
175 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
176 wrmsr(cmd->addr.msr.reg, lo, hi);
175 break; 177 break;
176 case SYSTEM_IO_CAPABLE: 178 case SYSTEM_IO_CAPABLE:
177 acpi_os_write_port((acpi_io_address)cmd->addr.io.port, 179 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
@@ -372,7 +374,6 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
372 struct cpufreq_freqs freqs; 374 struct cpufreq_freqs freqs;
373 cpumask_t online_policy_cpus; 375 cpumask_t online_policy_cpus;
374 struct drv_cmd cmd; 376 struct drv_cmd cmd;
375 unsigned int msr;
376 unsigned int next_state = 0; /* Index into freq_table */ 377 unsigned int next_state = 0; /* Index into freq_table */
377 unsigned int next_perf_state = 0; /* Index into perf table */ 378 unsigned int next_perf_state = 0; /* Index into perf table */
378 unsigned int i; 379 unsigned int i;
@@ -417,11 +418,7 @@ static int acpi_cpufreq_target(struct cpufreq_policy *policy,
417 case SYSTEM_INTEL_MSR_CAPABLE: 418 case SYSTEM_INTEL_MSR_CAPABLE:
418 cmd.type = SYSTEM_INTEL_MSR_CAPABLE; 419 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
419 cmd.addr.msr.reg = MSR_IA32_PERF_CTL; 420 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
420 msr = 421 cmd.val = (u32) perf->states[next_perf_state].control;
421 (u32) perf->states[next_perf_state].
422 control & INTEL_MSR_RANGE;
423 cmd.val = get_cur_val(online_policy_cpus);
424 cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr;
425 break; 422 break;
426 case SYSTEM_IO_CAPABLE: 423 case SYSTEM_IO_CAPABLE:
427 cmd.type = SYSTEM_IO_CAPABLE; 424 cmd.type = SYSTEM_IO_CAPABLE;