diff options
author | Andi Kleen <ak@suse.de> | 2007-05-21 08:31:47 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-21 12:56:57 -0400 |
commit | c12ceb766eb5ac975c1145d51236fcdcf81a6578 (patch) | |
tree | ecc1e605973e3877b99a45c858f57d5a4ceea1be /arch/i386 | |
parent | 21124a82bb82e100369846ff2044dd5ea65fc934 (diff) |
i386: Clear MCE flag on AMD K6
It reports machine check capability in CPUID, but doesn't actually
implement all the necessary MSRs of the standard Intel machine
check architecture.
This fixes a boot failure on K6s recently introduced.
Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/i386')
-rw-r--r-- | arch/i386/kernel/cpu/amd.c | 4 | ||||
-rw-r--r-- | arch/i386/kernel/cpu/mcheck/k7.c | 6 |
2 files changed, 7 insertions, 3 deletions
diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c index 4fec702afd7e..6f47eeeb93ea 100644 --- a/arch/i386/kernel/cpu/amd.c +++ b/arch/i386/kernel/cpu/amd.c | |||
@@ -280,6 +280,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
280 | 280 | ||
281 | if (c->x86 == 0x10 && !force_mwait) | 281 | if (c->x86 == 0x10 && !force_mwait) |
282 | clear_bit(X86_FEATURE_MWAIT, c->x86_capability); | 282 | clear_bit(X86_FEATURE_MWAIT, c->x86_capability); |
283 | |||
284 | /* K6s reports MCEs but don't actually have all the MSRs */ | ||
285 | if (c->x86 < 6) | ||
286 | clear_bit(X86_FEATURE_MCE, c->x86_capability); | ||
283 | } | 287 | } |
284 | 288 | ||
285 | static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) | 289 | static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size) |
diff --git a/arch/i386/kernel/cpu/mcheck/k7.c b/arch/i386/kernel/cpu/mcheck/k7.c index f9fa4142551e..eef63e3630c2 100644 --- a/arch/i386/kernel/cpu/mcheck/k7.c +++ b/arch/i386/kernel/cpu/mcheck/k7.c | |||
@@ -72,12 +72,12 @@ void amd_mcheck_init(struct cpuinfo_x86 *c) | |||
72 | u32 l, h; | 72 | u32 l, h; |
73 | int i; | 73 | int i; |
74 | 74 | ||
75 | machine_check_vector = k7_machine_check; | ||
76 | wmb(); | ||
77 | |||
78 | if (!cpu_has(c, X86_FEATURE_MCE)) | 75 | if (!cpu_has(c, X86_FEATURE_MCE)) |
79 | return; | 76 | return; |
80 | 77 | ||
78 | machine_check_vector = k7_machine_check; | ||
79 | wmb(); | ||
80 | |||
81 | printk (KERN_INFO "Intel machine check architecture supported.\n"); | 81 | printk (KERN_INFO "Intel machine check architecture supported.\n"); |
82 | rdmsr (MSR_IA32_MCG_CAP, l, h); | 82 | rdmsr (MSR_IA32_MCG_CAP, l, h); |
83 | if (l & (1<<8)) /* Control register present ? */ | 83 | if (l & (1<<8)) /* Control register present ? */ |