diff options
author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 19:41:27 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-01 19:41:27 -0500 |
commit | 72a73a69f6a79266b8b4b18f796907b73a5c01e3 (patch) | |
tree | 7684193f3c7f21b0ca14c430b8ead75b2c2025eb /arch/i386 | |
parent | 4549df891a31b9a05b7d183106c09049b79327be (diff) | |
parent | 2b290da053608692ea206507d993b70c39d2cdea (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6: (28 commits)
PCI: make arch/i386/pci/common.c:pci_bf_sort static
PCI: ibmphp_pci.c: fix NULL dereference
pciehp: remove unnecessary pci_disable_msi
pciehp: remove unnecessary free_irq
PCI: rpaphp: change device tree examination
PCI: Change memory allocation for acpiphp slots
i2c-i801: SMBus patch for Intel ICH9
PCI: irq: irq and pci_ids patch for Intel ICH9
PCI: pci_{enable,disable}_device() nestable ports
PCI: switch pci_{enable,disable}_device() to be nestable
PCI: arch/i386/kernel/pci-dma.c: ioremap balanced with iounmap
pci/i386: style cleanups
PCI: Block on access to temporarily unavailable pci device
pci: fix __pci_register_driver error handling
pci: clear osc support flags if no _OSC method
acpiphp: fix missing acpiphp_glue_exit()
acpiphp: fix use of list_for_each macro
Altix: Initial ACPI support - ROM shadowing.
Altix: SN ACPI hotplug support.
Altix: Add initial ACPI IO support
...
Diffstat (limited to 'arch/i386')
-rw-r--r-- | arch/i386/kernel/pci-dma.c | 4 | ||||
-rw-r--r-- | arch/i386/pci/common.c | 2 | ||||
-rw-r--r-- | arch/i386/pci/fixup.c | 46 | ||||
-rw-r--r-- | arch/i386/pci/i386.c | 64 | ||||
-rw-r--r-- | arch/i386/pci/irq.c | 6 |
5 files changed, 53 insertions, 69 deletions
diff --git a/arch/i386/kernel/pci-dma.c b/arch/i386/kernel/pci-dma.c index 25fe66853934..5c8c6ef1fc5e 100644 --- a/arch/i386/kernel/pci-dma.c +++ b/arch/i386/kernel/pci-dma.c | |||
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(dma_free_coherent); | |||
75 | int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | 75 | int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, |
76 | dma_addr_t device_addr, size_t size, int flags) | 76 | dma_addr_t device_addr, size_t size, int flags) |
77 | { | 77 | { |
78 | void __iomem *mem_base; | 78 | void __iomem *mem_base = NULL; |
79 | int pages = size >> PAGE_SHIFT; | 79 | int pages = size >> PAGE_SHIFT; |
80 | int bitmap_size = (pages + 31)/32; | 80 | int bitmap_size = (pages + 31)/32; |
81 | 81 | ||
@@ -114,6 +114,8 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | |||
114 | free1_out: | 114 | free1_out: |
115 | kfree(dev->dma_mem->bitmap); | 115 | kfree(dev->dma_mem->bitmap); |
116 | out: | 116 | out: |
117 | if (mem_base) | ||
118 | iounmap(mem_base); | ||
117 | return 0; | 119 | return 0; |
118 | } | 120 | } |
119 | EXPORT_SYMBOL(dma_declare_coherent_memory); | 121 | EXPORT_SYMBOL(dma_declare_coherent_memory); |
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c index cdfcf971098b..53ca6e897984 100644 --- a/arch/i386/pci/common.c +++ b/arch/i386/pci/common.c | |||
@@ -20,7 +20,7 @@ | |||
20 | unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | | 20 | unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | |
21 | PCI_PROBE_MMCONF; | 21 | PCI_PROBE_MMCONF; |
22 | 22 | ||
23 | int pci_bf_sort; | 23 | static int pci_bf_sort; |
24 | int pci_routeirq; | 24 | int pci_routeirq; |
25 | int pcibios_last_bus = -1; | 25 | int pcibios_last_bus = -1; |
26 | unsigned long pirq_table_addr; | 26 | unsigned long pirq_table_addr; |
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c index c1949ff38d61..cde1170b01a1 100644 --- a/arch/i386/pci/fixup.c +++ b/arch/i386/pci/fixup.c | |||
@@ -74,52 +74,6 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d) | |||
74 | } | 74 | } |
75 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810); | 75 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810); |
76 | 76 | ||
77 | static void __devinit pci_fixup_ide_bases(struct pci_dev *d) | ||
78 | { | ||
79 | int i; | ||
80 | |||
81 | /* | ||
82 | * PCI IDE controllers use non-standard I/O port decoding, respect it. | ||
83 | */ | ||
84 | if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE) | ||
85 | return; | ||
86 | DBG("PCI: IDE base address fixup for %s\n", pci_name(d)); | ||
87 | for(i=0; i<4; i++) { | ||
88 | struct resource *r = &d->resource[i]; | ||
89 | if ((r->start & ~0x80) == 0x374) { | ||
90 | r->start |= 2; | ||
91 | r->end = r->start; | ||
92 | } | ||
93 | } | ||
94 | } | ||
95 | DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases); | ||
96 | |||
97 | static void __devinit pci_fixup_ide_trash(struct pci_dev *d) | ||
98 | { | ||
99 | int i; | ||
100 | |||
101 | /* | ||
102 | * Runs the fixup only for the first IDE controller | ||
103 | * (Shai Fultheim - shai@ftcon.com) | ||
104 | */ | ||
105 | static int called = 0; | ||
106 | if (called) | ||
107 | return; | ||
108 | called = 1; | ||
109 | |||
110 | /* | ||
111 | * There exist PCI IDE controllers which have utter garbage | ||
112 | * in first four base registers. Ignore that. | ||
113 | */ | ||
114 | DBG("PCI: IDE base address trash cleared for %s\n", pci_name(d)); | ||
115 | for(i=0; i<4; i++) | ||
116 | d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0; | ||
117 | } | ||
118 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash); | ||
119 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_fixup_ide_trash); | ||
120 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_fixup_ide_trash); | ||
121 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_9, pci_fixup_ide_trash); | ||
122 | |||
123 | static void __devinit pci_fixup_latency(struct pci_dev *d) | 77 | static void __devinit pci_fixup_latency(struct pci_dev *d) |
124 | { | 78 | { |
125 | /* | 79 | /* |
diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c index 98580292f0d4..43005f044424 100644 --- a/arch/i386/pci/i386.c +++ b/arch/i386/pci/i386.c | |||
@@ -104,16 +104,24 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) | |||
104 | /* Depth-First Search on bus tree */ | 104 | /* Depth-First Search on bus tree */ |
105 | list_for_each_entry(bus, bus_list, node) { | 105 | list_for_each_entry(bus, bus_list, node) { |
106 | if ((dev = bus->self)) { | 106 | if ((dev = bus->self)) { |
107 | for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { | 107 | for (idx = PCI_BRIDGE_RESOURCES; |
108 | idx < PCI_NUM_RESOURCES; idx++) { | ||
108 | r = &dev->resource[idx]; | 109 | r = &dev->resource[idx]; |
109 | if (!r->flags) | 110 | if (!r->flags) |
110 | continue; | 111 | continue; |
111 | pr = pci_find_parent_resource(dev, r); | 112 | pr = pci_find_parent_resource(dev, r); |
112 | if (!r->start || !pr || request_resource(pr, r) < 0) { | 113 | if (!r->start || !pr || |
113 | printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev)); | 114 | request_resource(pr, r) < 0) { |
114 | /* Something is wrong with the region. | 115 | printk(KERN_ERR "PCI: Cannot allocate " |
115 | Invalidate the resource to prevent child | 116 | "resource region %d " |
116 | resource allocations in this range. */ | 117 | "of bridge %s\n", |
118 | idx, pci_name(dev)); | ||
119 | /* | ||
120 | * Something is wrong with the region. | ||
121 | * Invalidate the resource to prevent | ||
122 | * child resource allocations in this | ||
123 | * range. | ||
124 | */ | ||
117 | r->flags = 0; | 125 | r->flags = 0; |
118 | } | 126 | } |
119 | } | 127 | } |
@@ -131,7 +139,7 @@ static void __init pcibios_allocate_resources(int pass) | |||
131 | 139 | ||
132 | for_each_pci_dev(dev) { | 140 | for_each_pci_dev(dev) { |
133 | pci_read_config_word(dev, PCI_COMMAND, &command); | 141 | pci_read_config_word(dev, PCI_COMMAND, &command); |
134 | for(idx = 0; idx < 6; idx++) { | 142 | for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) { |
135 | r = &dev->resource[idx]; | 143 | r = &dev->resource[idx]; |
136 | if (r->parent) /* Already allocated */ | 144 | if (r->parent) /* Already allocated */ |
137 | continue; | 145 | continue; |
@@ -142,11 +150,15 @@ static void __init pcibios_allocate_resources(int pass) | |||
142 | else | 150 | else |
143 | disabled = !(command & PCI_COMMAND_MEMORY); | 151 | disabled = !(command & PCI_COMMAND_MEMORY); |
144 | if (pass == disabled) { | 152 | if (pass == disabled) { |
145 | DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n", | 153 | DBG("PCI: Resource %08lx-%08lx " |
154 | "(f=%lx, d=%d, p=%d)\n", | ||
146 | r->start, r->end, r->flags, disabled, pass); | 155 | r->start, r->end, r->flags, disabled, pass); |
147 | pr = pci_find_parent_resource(dev, r); | 156 | pr = pci_find_parent_resource(dev, r); |
148 | if (!pr || request_resource(pr, r) < 0) { | 157 | if (!pr || request_resource(pr, r) < 0) { |
149 | printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev)); | 158 | printk(KERN_ERR "PCI: Cannot allocate " |
159 | "resource region %d " | ||
160 | "of device %s\n", | ||
161 | idx, pci_name(dev)); | ||
150 | /* We'll assign a new address later */ | 162 | /* We'll assign a new address later */ |
151 | r->end -= r->start; | 163 | r->end -= r->start; |
152 | r->start = 0; | 164 | r->start = 0; |
@@ -156,12 +168,16 @@ static void __init pcibios_allocate_resources(int pass) | |||
156 | if (!pass) { | 168 | if (!pass) { |
157 | r = &dev->resource[PCI_ROM_RESOURCE]; | 169 | r = &dev->resource[PCI_ROM_RESOURCE]; |
158 | if (r->flags & IORESOURCE_ROM_ENABLE) { | 170 | if (r->flags & IORESOURCE_ROM_ENABLE) { |
159 | /* Turn the ROM off, leave the resource region, but keep it unregistered. */ | 171 | /* Turn the ROM off, leave the resource region, |
172 | * but keep it unregistered. */ | ||
160 | u32 reg; | 173 | u32 reg; |
161 | DBG("PCI: Switching off ROM of %s\n", pci_name(dev)); | 174 | DBG("PCI: Switching off ROM of %s\n", |
175 | pci_name(dev)); | ||
162 | r->flags &= ~IORESOURCE_ROM_ENABLE; | 176 | r->flags &= ~IORESOURCE_ROM_ENABLE; |
163 | pci_read_config_dword(dev, dev->rom_base_reg, ®); | 177 | pci_read_config_dword(dev, |
164 | pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE); | 178 | dev->rom_base_reg, ®); |
179 | pci_write_config_dword(dev, dev->rom_base_reg, | ||
180 | reg & ~PCI_ROM_ADDRESS_ENABLE); | ||
165 | } | 181 | } |
166 | } | 182 | } |
167 | } | 183 | } |
@@ -173,9 +189,11 @@ static int __init pcibios_assign_resources(void) | |||
173 | struct resource *r, *pr; | 189 | struct resource *r, *pr; |
174 | 190 | ||
175 | if (!(pci_probe & PCI_ASSIGN_ROMS)) { | 191 | if (!(pci_probe & PCI_ASSIGN_ROMS)) { |
176 | /* Try to use BIOS settings for ROMs, otherwise let | 192 | /* |
177 | pci_assign_unassigned_resources() allocate the new | 193 | * Try to use BIOS settings for ROMs, otherwise let |
178 | addresses. */ | 194 | * pci_assign_unassigned_resources() allocate the new |
195 | * addresses. | ||
196 | */ | ||
179 | for_each_pci_dev(dev) { | 197 | for_each_pci_dev(dev) { |
180 | r = &dev->resource[PCI_ROM_RESOURCE]; | 198 | r = &dev->resource[PCI_ROM_RESOURCE]; |
181 | if (!r->flags || !r->start) | 199 | if (!r->flags || !r->start) |
@@ -215,9 +233,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) | |||
215 | 233 | ||
216 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | 234 | pci_read_config_word(dev, PCI_COMMAND, &cmd); |
217 | old_cmd = cmd; | 235 | old_cmd = cmd; |
218 | for(idx = 0; idx < PCI_NUM_RESOURCES; idx++) { | 236 | for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) { |
219 | /* Only set up the requested stuff */ | 237 | /* Only set up the requested stuff */ |
220 | if (!(mask & (1<<idx))) | 238 | if (!(mask & (1 << idx))) |
221 | continue; | 239 | continue; |
222 | 240 | ||
223 | r = &dev->resource[idx]; | 241 | r = &dev->resource[idx]; |
@@ -227,7 +245,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) | |||
227 | (!(r->flags & IORESOURCE_ROM_ENABLE))) | 245 | (!(r->flags & IORESOURCE_ROM_ENABLE))) |
228 | continue; | 246 | continue; |
229 | if (!r->start && r->end) { | 247 | if (!r->start && r->end) { |
230 | printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); | 248 | printk(KERN_ERR "PCI: Device %s not available " |
249 | "because of resource collisions\n", | ||
250 | pci_name(dev)); | ||
231 | return -EINVAL; | 251 | return -EINVAL; |
232 | } | 252 | } |
233 | if (r->flags & IORESOURCE_IO) | 253 | if (r->flags & IORESOURCE_IO) |
@@ -236,7 +256,8 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask) | |||
236 | cmd |= PCI_COMMAND_MEMORY; | 256 | cmd |= PCI_COMMAND_MEMORY; |
237 | } | 257 | } |
238 | if (cmd != old_cmd) { | 258 | if (cmd != old_cmd) { |
239 | printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); | 259 | printk("PCI: Enabling device %s (%04x -> %04x)\n", |
260 | pci_name(dev), old_cmd, cmd); | ||
240 | pci_write_config_word(dev, PCI_COMMAND, cmd); | 261 | pci_write_config_word(dev, PCI_COMMAND, cmd); |
241 | } | 262 | } |
242 | return 0; | 263 | return 0; |
@@ -258,7 +279,8 @@ void pcibios_set_master(struct pci_dev *dev) | |||
258 | lat = pcibios_max_latency; | 279 | lat = pcibios_max_latency; |
259 | else | 280 | else |
260 | return; | 281 | return; |
261 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); | 282 | printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", |
283 | pci_name(dev), lat); | ||
262 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); | 284 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); |
263 | } | 285 | } |
264 | 286 | ||
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c index 69163998adeb..e65551cd8216 100644 --- a/arch/i386/pci/irq.c +++ b/arch/i386/pci/irq.c | |||
@@ -543,6 +543,12 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route | |||
543 | case PCI_DEVICE_ID_INTEL_ICH8_2: | 543 | case PCI_DEVICE_ID_INTEL_ICH8_2: |
544 | case PCI_DEVICE_ID_INTEL_ICH8_3: | 544 | case PCI_DEVICE_ID_INTEL_ICH8_3: |
545 | case PCI_DEVICE_ID_INTEL_ICH8_4: | 545 | case PCI_DEVICE_ID_INTEL_ICH8_4: |
546 | case PCI_DEVICE_ID_INTEL_ICH9_0: | ||
547 | case PCI_DEVICE_ID_INTEL_ICH9_1: | ||
548 | case PCI_DEVICE_ID_INTEL_ICH9_2: | ||
549 | case PCI_DEVICE_ID_INTEL_ICH9_3: | ||
550 | case PCI_DEVICE_ID_INTEL_ICH9_4: | ||
551 | case PCI_DEVICE_ID_INTEL_ICH9_5: | ||
546 | r->name = "PIIX/ICH"; | 552 | r->name = "PIIX/ICH"; |
547 | r->get = pirq_piix_get; | 553 | r->get = pirq_piix_get; |
548 | r->set = pirq_piix_set; | 554 | r->set = pirq_piix_set; |