aboutsummaryrefslogtreecommitdiffstats
path: root/arch/i386
diff options
context:
space:
mode:
authorRudolf Marek <r.marek@assembler.cz>2007-05-08 11:22:01 -0400
committerJean Delvare <khali@hyperion.delvare>2007-05-08 11:22:01 -0400
commit4e9baad8f5cb2040e802eff484fad7e721b21c0b (patch)
tree35bd0bdbc9185b0a21d56b32fbd78390a06b1b41 /arch/i386
parent9ca8e40c8414d25e880b587cbd4d130750c49588 (diff)
i386: Add safe variants of rdmsr_on_cpu and wrmsr_on_cpu
Add safe (exception handled) variants of rdmsr_on_cpu and wrmsr_on_cpu. You should use these when the target MSR may not actually exist, as doing so could trigger an exception which the regular functions do not handle. The safe variants are slower, though. The upcoming coretemp hardware monitoring driver will need this. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Cc: Alexey Dobriyan <adobriyan@openvz.org> Cc: Dave Jones <davej@redhat.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
Diffstat (limited to 'arch/i386')
-rw-r--r--arch/i386/lib/msr-on-cpu.c73
1 files changed, 67 insertions, 6 deletions
diff --git a/arch/i386/lib/msr-on-cpu.c b/arch/i386/lib/msr-on-cpu.c
index 1c46bda409ff..7767962f25d3 100644
--- a/arch/i386/lib/msr-on-cpu.c
+++ b/arch/i386/lib/msr-on-cpu.c
@@ -6,6 +6,7 @@
6struct msr_info { 6struct msr_info {
7 u32 msr_no; 7 u32 msr_no;
8 u32 l, h; 8 u32 l, h;
9 int err;
9}; 10};
10 11
11static void __rdmsr_on_cpu(void *info) 12static void __rdmsr_on_cpu(void *info)
@@ -15,20 +16,38 @@ static void __rdmsr_on_cpu(void *info)
15 rdmsr(rv->msr_no, rv->l, rv->h); 16 rdmsr(rv->msr_no, rv->l, rv->h);
16} 17}
17 18
18void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) 19static void __rdmsr_safe_on_cpu(void *info)
19{ 20{
21 struct msr_info *rv = info;
22
23 rv->err = rdmsr_safe(rv->msr_no, &rv->l, &rv->h);
24}
25
26static int _rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h, int safe)
27{
28 int err = 0;
20 preempt_disable(); 29 preempt_disable();
21 if (smp_processor_id() == cpu) 30 if (smp_processor_id() == cpu)
22 rdmsr(msr_no, *l, *h); 31 if (safe)
32 err = rdmsr_safe(msr_no, l, h);
33 else
34 rdmsr(msr_no, *l, *h);
23 else { 35 else {
24 struct msr_info rv; 36 struct msr_info rv;
25 37
26 rv.msr_no = msr_no; 38 rv.msr_no = msr_no;
27 smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 0, 1); 39 if (safe) {
40 smp_call_function_single(cpu, __rdmsr_safe_on_cpu,
41 &rv, 0, 1);
42 err = rv.err;
43 } else {
44 smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 0, 1);
45 }
28 *l = rv.l; 46 *l = rv.l;
29 *h = rv.h; 47 *h = rv.h;
30 } 48 }
31 preempt_enable(); 49 preempt_enable();
50 return err;
32} 51}
33 52
34static void __wrmsr_on_cpu(void *info) 53static void __wrmsr_on_cpu(void *info)
@@ -38,21 +57,63 @@ static void __wrmsr_on_cpu(void *info)
38 wrmsr(rv->msr_no, rv->l, rv->h); 57 wrmsr(rv->msr_no, rv->l, rv->h);
39} 58}
40 59
41void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) 60static void __wrmsr_safe_on_cpu(void *info)
42{ 61{
62 struct msr_info *rv = info;
63
64 rv->err = wrmsr_safe(rv->msr_no, rv->l, rv->h);
65}
66
67static int _wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h, int safe)
68{
69 int err = 0;
43 preempt_disable(); 70 preempt_disable();
44 if (smp_processor_id() == cpu) 71 if (smp_processor_id() == cpu)
45 wrmsr(msr_no, l, h); 72 if (safe)
73 err = wrmsr_safe(msr_no, l, h);
74 else
75 wrmsr(msr_no, l, h);
46 else { 76 else {
47 struct msr_info rv; 77 struct msr_info rv;
48 78
49 rv.msr_no = msr_no; 79 rv.msr_no = msr_no;
50 rv.l = l; 80 rv.l = l;
51 rv.h = h; 81 rv.h = h;
52 smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 0, 1); 82 if (safe) {
83 smp_call_function_single(cpu, __wrmsr_safe_on_cpu,
84 &rv, 0, 1);
85 err = rv.err;
86 } else {
87 smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 0, 1);
88 }
53 } 89 }
54 preempt_enable(); 90 preempt_enable();
91 return err;
92}
93
94void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
95{
96 _wrmsr_on_cpu(cpu, msr_no, l, h, 0);
97}
98
99void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
100{
101 _rdmsr_on_cpu(cpu, msr_no, l, h, 0);
102}
103
104/* These "safe" variants are slower and should be used when the target MSR
105 may not actually exist. */
106int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
107{
108 return _wrmsr_on_cpu(cpu, msr_no, l, h, 1);
109}
110
111int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
112{
113 return _rdmsr_on_cpu(cpu, msr_no, l, h, 1);
55} 114}
56 115
57EXPORT_SYMBOL(rdmsr_on_cpu); 116EXPORT_SYMBOL(rdmsr_on_cpu);
58EXPORT_SYMBOL(wrmsr_on_cpu); 117EXPORT_SYMBOL(wrmsr_on_cpu);
118EXPORT_SYMBOL(rdmsr_safe_on_cpu);
119EXPORT_SYMBOL(wrmsr_safe_on_cpu);