Merge branch 'from-linus' into upstream

6 files changed, 33 insertions, 7 deletions

diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index c6fe99e57a05..8dfa3054f10f 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -758,10 +758,10 @@ config HOTPLUG_CPU
         bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
         depends on SMP && HOTPLUG && EXPERIMENTAL && !X86_VOYAGER
         ---help---
-          Say Y here to experiment with turning CPUs off and on.  CPUs
-          can be controlled through /sys/devices/system/cpu.
+          Say Y here to experiment with turning CPUs off and on, and to
+          enable suspend on SMP systems. CPUs can be controlled through
+          /sys/devices/system/cpu.
 
-          Say N.
 
 endmenu
 
diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c
index 40e5aba3ad3d..daee69579b1c 100644
--- a/arch/i386/kernel/acpi/boot.c
+++ b/arch/i386/kernel/acpi/boot.c
@@ -1066,6 +1066,14 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = {
                      DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
                      },
          },
+        {
+         .callback = disable_acpi_pci,
+         .ident = "HP xw9300",
+         .matches = {
+                    DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
+                    DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
+                    },
+        },
         {}
 };
 
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index f8f132aa5472..d70f2ade5cde 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -2238,6 +2238,8 @@ static inline void unlock_ExtINT_logic(void)
         spin_unlock_irqrestore(&ioapic_lock, flags);
 }
 
+int timer_uses_ioapic_pin_0;
+
 /*
  * This code may look a bit paranoid, but it's supposed to cooperate with
  * a wide range of boards and BIOS bugs.  Fortunately only the timer IRQ
@@ -2274,6 +2276,9 @@ static inline void check_timer(void)
         pin2  = ioapic_i8259.pin;
         apic2 = ioapic_i8259.apic;
 
+        if (pin1 == 0)
+                timer_uses_ioapic_pin_0 = 1;
+
         printk(KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
                 vector, apic1, pin1, apic2, pin2);
 
diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c
index 34d21e21e012..6b1392d33ed5 100644
--- a/arch/i386/kernel/mpparse.c
+++ b/arch/i386/kernel/mpparse.c
@@ -1130,7 +1130,17 @@ int mp_register_gsi (u32 gsi, int triggering, int polarity)
                  */
                 int irq = gsi;
                 if (gsi < MAX_GSI_NUM) {
-                        if (gsi > 15)
+                        /*
+                         * Retain the VIA chipset work-around (gsi > 15), but
+                         * avoid a problem where the 8254 timer (IRQ0) is setup
+                         * via an override (so it's not on pin 0 of the ioapic),
+                         * and at the same time, the pin 0 interrupt is a PCI
+                         * type.  The gsi > 15 test could cause these two pins
+                         * to be shared as IRQ0, and they are not shareable.
+                         * So test for this condition, and if necessary, avoid
+                         * the pin collision.
+                         */
+                        if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
                                 gsi = pci_irq++;
                         /*
                          * Don't assign IRQ used by ACPI SCI
diff --git a/arch/i386/kernel/setup.c b/arch/i386/kernel/setup.c
index d77e89ac0d54..846e1639ef7c 100644
--- a/arch/i386/kernel/setup.c
+++ b/arch/i386/kernel/setup.c
@@ -1320,6 +1320,8 @@ legacy_init_iomem_resources(struct resource *code_resource, struct resource *dat
         probe_roms();
         for (i = 0; i < e820.nr_map; i++) {
                 struct resource *res;
+                if (e820.map[i].addr + e820.map[i].size > 0x100000000ULL)
+                        continue;
                 res = kzalloc(sizeof(struct resource), GFP_ATOMIC);
                 switch (e820.map[i].type) {
                 case E820_RAM:  res->name = "System RAM"; break;
diff --git a/arch/i386/oprofile/nmi_int.c b/arch/i386/oprofile/nmi_int.c
index 1a2076ce6f6a..ec0fd3cfa774 100644
--- a/arch/i386/oprofile/nmi_int.c
+++ b/arch/i386/oprofile/nmi_int.c
@@ -332,10 +332,11 @@ static int __init ppro_init(char ** cpu_type)
 {
         __u8 cpu_model = boot_cpu_data.x86_model;
 
-        if (cpu_model > 0xd)
+        if (cpu_model == 14)
+                *cpu_type = "i386/core";
+        else if (cpu_model > 0xd)
                 return 0;
-
-        if (cpu_model == 9) {
+        else if (cpu_model == 9) {
                 *cpu_type = "i386/p6_mobile";
         } else if (cpu_model > 5) {
                 *cpu_type = "i386/piii";