Merge /spare/repo/linux-2.6/

4 files changed, 0 insertions, 58 deletions

diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index b22f003eaa6d..d2703cda61ea 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -908,11 +908,6 @@ config IRQBALANCE
           The default yes will allow the kernel to do irq load balancing.
           Saying no will keep the kernel from doing irq load balancing.
 
-config HAVE_DEC_LOCK
-        bool
-        depends on (SMP || PREEMPT) && X86_CMPXCHG
-        default y
-
 # turning this on wastes a bunch of space.
 # Summit needs it only when NUMA is on
 config BOOT_IOREMAP
diff --git a/arch/i386/kernel/acpi/earlyquirk.c b/arch/i386/kernel/acpi/earlyquirk.c
index 1ae2aeeda18b..f1b9d2a46dab 100644
--- a/arch/i386/kernel/acpi/earlyquirk.c
+++ b/arch/i386/kernel/acpi/earlyquirk.c
@@ -7,7 +7,6 @@
 #include <linux/pci.h>
 #include <asm/pci-direct.h>
 #include <asm/acpi.h>
-#include <asm/apic.h>
 
 static int __init check_bridge(int vendor, int device)
 {
@@ -16,15 +15,6 @@ static int __init check_bridge(int vendor, int device)
         if (vendor == PCI_VENDOR_ID_NVIDIA) {
                 acpi_skip_timer_override = 1;
         }
-#ifdef CONFIG_X86_LOCAL_APIC
-        /*
-         * ATI IXP chipsets get double timer interrupts.
-         * For now just do this for all ATI chipsets.
-         * FIXME: this needs to be checked for the non ACPI case too.
-         */
-        if (vendor == PCI_VENDOR_ID_ATI)
-                disable_timer_pin_1 = 1;
-#endif
         return 0;
 }
 
diff --git a/arch/i386/lib/Makefile b/arch/i386/lib/Makefile
index 7b1932d20f96..914933e9ec3d 100644
--- a/arch/i386/lib/Makefile
+++ b/arch/i386/lib/Makefile
@@ -7,4 +7,3 @@ lib-y = checksum.o delay.o usercopy.o getuser.o putuser.o memcpy.o strstr.o \
         bitops.o
 
 lib-$(CONFIG_X86_USE_3DNOW) += mmx.o
-lib-$(CONFIG_HAVE_DEC_LOCK) += dec_and_lock.o
diff --git a/arch/i386/lib/dec_and_lock.c b/arch/i386/lib/dec_and_lock.c
deleted file mode 100644
index 8b81b2524fa6..000000000000
--- a/arch/i386/lib/dec_and_lock.c
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * x86 version of "atomic_dec_and_lock()" using
- * the atomic "cmpxchg" instruction.
- *
- * (For CPU's lacking cmpxchg, we use the slow
- * generic version, and this one never even gets
- * compiled).
- */
-
-#include <linux/spinlock.h>
-#include <linux/module.h>
-#include <asm/atomic.h>
-
-int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock)
-{
-        int counter;
-        int newcount;
-
-repeat:
-        counter = atomic_read(atomic);
-        newcount = counter-1;
-
-        if (!newcount)
-                goto slow_path;
-
-        asm volatile("lock; cmpxchgl %1,%2"
-                :"=a" (newcount)
-                :"r" (newcount), "m" (atomic->counter), "0" (counter));
-
-        /* If the above failed, "eax" will have changed */
-        if (newcount != counter)
-                goto repeat;
-        return 0;
-
-slow_path:
-        spin_lock(lock);
-        if (atomic_dec_and_test(atomic))
-                return 1;
-        spin_unlock(lock);
-        return 0;
-}
-EXPORT_SYMBOL(_atomic_dec_and_lock);