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authorStephane Eranian <eranian@hpl.hp.com>2006-12-06 20:14:11 -0500
committerAndi Kleen <andi@basil.nowhere.org>2006-12-06 20:14:11 -0500
commit538f188e03c821c93b355c9fc346806cdd34e286 (patch)
tree4fa4a37d35444a51a30722a2af8f8f57ea11449d /arch/i386
parentee58fad51a2a767cb2567706ace967705233d881 (diff)
[PATCH] i386: i386 add Intel BTS cpufeature bit and detection (take 2)
Here is a small patch for i386 which adds a cpufeature flag and detection code for Intel's Branch Trace Store (BTS) feature. This feature can be found on Intel P4 and Core 2 processors among others. It can also be used by perfmon. changelog: - add CPU_FEATURE_BTS - add Branch Trace Store detection signed-off-by: stephane eranian <eranian@hpl.hp.com> Signed-off-by: Andi Kleen <ak@suse.de>
Diffstat (limited to 'arch/i386')
-rw-r--r--arch/i386/kernel/cpu/intel.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/i386/kernel/cpu/intel.c b/arch/i386/kernel/cpu/intel.c
index 3ae795e9056d..56fe26584957 100644
--- a/arch/i386/kernel/cpu/intel.c
+++ b/arch/i386/kernel/cpu/intel.c
@@ -199,6 +199,8 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
199 if (cpu_has_ds) { 199 if (cpu_has_ds) {
200 unsigned int l1; 200 unsigned int l1;
201 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); 201 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2);
202 if (!(l1 & (1<<11)))
203 set_bit(X86_FEATURE_BTS, c->x86_capability);
202 if (!(l1 & (1<<12))) 204 if (!(l1 & (1<<12)))
203 set_bit(X86_FEATURE_PEBS, c->x86_capability); 205 set_bit(X86_FEATURE_PEBS, c->x86_capability);
204 } 206 }