Merge branch 'master'

14 files changed, 184 insertions, 148 deletions

diff --git a/arch/i386/Kconfig b/arch/i386/Kconfig
index daa75ce4b777..f71fb4a029cb 100644
--- a/arch/i386/Kconfig
+++ b/arch/i386/Kconfig
@@ -672,7 +672,7 @@ config MTRR
           See <file:Documentation/mtrr.txt> for more information.
 
 config EFI
-        bool "Boot from EFI support (EXPERIMENTAL)"
+        bool "Boot from EFI support"
         depends on ACPI
         default n
         ---help---
diff --git a/arch/i386/kernel/Makefile b/arch/i386/kernel/Makefile
index 1b452a1665c4..ab98fc21a541 100644
--- a/arch/i386/kernel/Makefile
+++ b/arch/i386/kernel/Makefile
@@ -59,7 +59,8 @@ quiet_cmd_syscall = SYSCALL $@
 
 export CPPFLAGS_vsyscall.lds += -P -C -U$(ARCH)
 
-vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1
+vsyscall-flags = -shared -s -Wl,-soname=linux-gate.so.1 \
+                 $(call ld-option, -Wl$(comma)--hash-style=sysv)
 SYSCFLAGS_vsyscall-sysenter.so  = $(vsyscall-flags)
 SYSCFLAGS_vsyscall-int80.so     = $(vsyscall-flags)
 
diff --git a/arch/i386/kernel/cpu/cpufreq/Kconfig b/arch/i386/kernel/cpu/cpufreq/Kconfig
index e44a4c6a4fe5..ccc1edff5c97 100644
--- a/arch/i386/kernel/cpu/cpufreq/Kconfig
+++ b/arch/i386/kernel/cpu/cpufreq/Kconfig
@@ -96,6 +96,7 @@ config X86_POWERNOW_K8_ACPI
 
 config X86_GX_SUSPMOD
         tristate "Cyrix MediaGX/NatSemi Geode Suspend Modulation"
+        depends on PCI
         help
          This add the CPUFreq driver for NatSemi Geode processors which
          support suspend modulation.
@@ -202,7 +203,7 @@ config X86_LONGRUN
 config X86_LONGHAUL
         tristate "VIA Cyrix III Longhaul"
         select CPU_FREQ_TABLE
-        depends on BROKEN
+        depends on ACPI_PROCESSOR
         help
           This adds the CPUFreq driver for VIA Samuel/CyrixIII,
           VIA Cyrix Samuel/C3, VIA Cyrix Ezra and VIA Cyrix Ezra-T
diff --git a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
index 567b39bea07e..efb41e81351c 100644
--- a/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
+++ b/arch/i386/kernel/cpu/cpufreq/acpi-cpufreq.c
@@ -384,8 +384,7 @@ static int acpi_cpufreq_early_init_acpi(void)
         }
 
         /* Do initialization in ACPI core */
-        acpi_processor_preregister_performance(acpi_perf_data);
-        return 0;
+        return acpi_processor_preregister_performance(acpi_perf_data);
 }
 
 static int
diff --git a/arch/i386/kernel/cpu/cpufreq/longhaul.c b/arch/i386/kernel/cpu/cpufreq/longhaul.c
index 146f607e9c44..4f2c3aeef724 100644
--- a/arch/i386/kernel/cpu/cpufreq/longhaul.c
+++ b/arch/i386/kernel/cpu/cpufreq/longhaul.c
@@ -29,11 +29,13 @@
 #include <linux/cpufreq.h>
 #include <linux/slab.h>
 #include <linux/string.h>
-#include <linux/pci.h>
 
 #include <asm/msr.h>
 #include <asm/timex.h>
 #include <asm/io.h>
+#include <asm/acpi.h>
+#include <linux/acpi.h>
+#include <acpi/processor.h>
 
 #include "longhaul.h"
 
@@ -56,6 +58,8 @@ static int minvid, maxvid;
 static unsigned int minmult, maxmult;
 static int can_scale_voltage;
 static int vrmrev;
+static struct acpi_processor *pr = NULL;
+static struct acpi_processor_cx *cx = NULL;
 
 /* Module parameters */
 static int dont_scale_voltage;
@@ -118,84 +122,65 @@ static int longhaul_get_cpu_mult(void)
         return eblcr_table[invalue];
 }
 
+/* For processor with BCR2 MSR */
 
-static void do_powersaver(union msr_longhaul *longhaul,
-                        unsigned int clock_ratio_index)
+static void do_longhaul1(int cx_address, unsigned int clock_ratio_index)
 {
-        struct pci_dev *dev;
-        unsigned long flags;
-        unsigned int tmp_mask;
-        int version;
-        int i;
-        u16 pci_cmd;
-        u16 cmd_state[64];
+        union msr_bcr2 bcr2;
+        u32 t;
 
-        switch (cpu_model) {
-        case CPU_EZRA_T:
-                version = 3;
-                break;
-        case CPU_NEHEMIAH:
-                version = 0xf;
-                break;
-        default:
-                return;
-        }
+        rdmsrl(MSR_VIA_BCR2, bcr2.val);
+        /* Enable software clock multiplier */
+        bcr2.bits.ESOFTBF = 1;
+        bcr2.bits.CLOCKMUL = clock_ratio_index;
 
-        rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
-        longhaul->bits.SoftBusRatio = clock_ratio_index & 0xf;
-        longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
-        longhaul->bits.EnableSoftBusRatio = 1;
-        longhaul->bits.RevisionKey = 0;
+        /* Sync to timer tick */
+        safe_halt();
+        ACPI_FLUSH_CPU_CACHE();
+        /* Change frequency on next halt or sleep */
+        wrmsrl(MSR_VIA_BCR2, bcr2.val);
+        /* Invoke C3 */
+        inb(cx_address);
+        /* Dummy op - must do something useless after P_LVL3 read */
+        t = inl(acpi_fadt.xpm_tmr_blk.address);
+
+        /* Disable software clock multiplier */
+        local_irq_disable();
+        rdmsrl(MSR_VIA_BCR2, bcr2.val);
+        bcr2.bits.ESOFTBF = 0;
+        wrmsrl(MSR_VIA_BCR2, bcr2.val);
+}
 
-        preempt_disable();
-        local_irq_save(flags);
+/* For processor with Longhaul MSR */
 
-        /*
-         * get current pci bus master state for all devices
-         * and clear bus master bit
-         */
-        dev = NULL;
-        i = 0;
-        do {
-                dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
-                if (dev != NULL) {
-                        pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
-                        cmd_state[i++] = pci_cmd;
-                        pci_cmd &= ~PCI_COMMAND_MASTER;
-                        pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
-                }
-        } while (dev != NULL);
+static void do_powersaver(int cx_address, unsigned int clock_ratio_index)
+{
+        union msr_longhaul longhaul;
+        u32 t;
 
-        tmp_mask=inb(0x21);     /* works on C3. save mask. */
-        outb(0xFE,0x21);        /* TMR0 only */
-        outb(0xFF,0x80);        /* delay */
+        rdmsrl(MSR_VIA_LONGHAUL, longhaul.val);
+        longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
+        longhaul.bits.SoftBusRatio = clock_ratio_index & 0xf;
+        longhaul.bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
+        longhaul.bits.EnableSoftBusRatio = 1;
 
+        /* Sync to timer tick */
         safe_halt();
-        wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
-        halt();
-
+        ACPI_FLUSH_CPU_CACHE();
+        /* Change frequency on next halt or sleep */
+        wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
+        /* Invoke C3 */
+        inb(cx_address);
+        /* Dummy op - must do something useless after P_LVL3 read */
+        t = inl(acpi_fadt.xpm_tmr_blk.address);
+
+        /* Disable bus ratio bit */
         local_irq_disable();
-
-        outb(tmp_mask,0x21);    /* restore mask */
-
-        /* restore pci bus master state for all devices */
-        dev = NULL;
-        i = 0;
-        do {
-                dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
-                if (dev != NULL) {
-                        pci_cmd = cmd_state[i++];
-                        pci_write_config_byte(dev, PCI_COMMAND, pci_cmd);
-                }
-        } while (dev != NULL);
-        local_irq_restore(flags);
-        preempt_enable();
-
-        /* disable bus ratio bit */
-        rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
-        longhaul->bits.EnableSoftBusRatio = 0;
-        longhaul->bits.RevisionKey = version;
-        wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
+        longhaul.bits.RevisionKey = longhaul.bits.RevisionID;
+        longhaul.bits.EnableSoftBusRatio = 0;
+        longhaul.bits.EnableSoftBSEL = 0;
+        longhaul.bits.EnableSoftVID = 0;
+        wrmsrl(MSR_VIA_LONGHAUL, longhaul.val);
 }
 
 /**
@@ -209,9 +194,9 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
 {
         int speed, mult;
         struct cpufreq_freqs freqs;
-        union msr_longhaul longhaul;
-        union msr_bcr2 bcr2;
         static unsigned int old_ratio=-1;
+        unsigned long flags;
+        unsigned int pic1_mask, pic2_mask;
 
         if (old_ratio == clock_ratio_index)
                 return;
@@ -234,6 +219,20 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
         dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
                         fsb, mult/10, mult%10, print_speed(speed/1000));
 
+        preempt_disable();
+        local_irq_save(flags);
+
+        pic2_mask = inb(0xA1);
+        pic1_mask = inb(0x21);  /* works on C3. save mask. */
+        outb(0xFF,0xA1);        /* Overkill */
+        outb(0xFE,0x21);        /* TMR0 only */
+
+        /* Disable bus master arbitration */
+        if (pr->flags.bm_check) {
+                acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1,
+                                  ACPI_MTX_DO_NOT_LOCK);
+        }
+
         switch (longhaul_version) {
 
         /*
@@ -245,20 +244,7 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
          */
         case TYPE_LONGHAUL_V1:
         case TYPE_LONGHAUL_V2:
-                rdmsrl (MSR_VIA_BCR2, bcr2.val);
-                /* Enable software clock multiplier */
-                bcr2.bits.ESOFTBF = 1;
-                bcr2.bits.CLOCKMUL = clock_ratio_index;
-                local_irq_disable();
-                wrmsrl (MSR_VIA_BCR2, bcr2.val);
-                safe_halt();
-
-                /* Disable software clock multiplier */
-                rdmsrl (MSR_VIA_BCR2, bcr2.val);
-                bcr2.bits.ESOFTBF = 0;
-                local_irq_disable();
-                wrmsrl (MSR_VIA_BCR2, bcr2.val);
-                local_irq_enable();
+                do_longhaul1(cx->address, clock_ratio_index);
                 break;
 
         /*
@@ -273,10 +259,22 @@ static void longhaul_setstate(unsigned int clock_ratio_index)
          * to work in practice.
          */
         case TYPE_POWERSAVER:
-                do_powersaver(&longhaul, clock_ratio_index);
+                do_powersaver(cx->address, clock_ratio_index);
                 break;
         }
 
+        /* Enable bus master arbitration */
+        if (pr->flags.bm_check) {
+                acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0,
+                                  ACPI_MTX_DO_NOT_LOCK);
+        }
+
+        outb(pic2_mask,0xA1);   /* restore mask */
+        outb(pic1_mask,0x21);
+
+        local_irq_restore(flags);
+        preempt_enable();
+
         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 }
 
@@ -324,9 +322,11 @@ static int guess_fsb(void)
 static int __init longhaul_get_ranges(void)
 {
         unsigned long invalue;
-        unsigned int multipliers[32]= {
-                50,30,40,100,55,35,45,95,90,70,80,60,120,75,85,65,
-                -1,110,120,-1,135,115,125,105,130,150,160,140,-1,155,-1,145 };
+        unsigned int ezra_t_multipliers[32]= {
+                        90,  30,  40, 100,  55,  35,  45,  95,
+                        50,  70,  80,  60, 120,  75,  85,  65,
+                        -1, 110, 120,  -1, 135, 115, 125, 105,
+                        130, 150, 160, 140,  -1, 155,  -1, 145 };
         unsigned int j, k = 0;
         union msr_longhaul longhaul;
         unsigned long lo, hi;
@@ -355,13 +355,13 @@ static int __init longhaul_get_ranges(void)
                         invalue = longhaul.bits.MaxMHzBR;
                         if (longhaul.bits.MaxMHzBR4)
                                 invalue += 16;
-                        maxmult=multipliers[invalue];
+                        maxmult=ezra_t_multipliers[invalue];
 
                         invalue = longhaul.bits.MinMHzBR;
                         if (longhaul.bits.MinMHzBR4 == 1)
                                 minmult = 30;
                         else
-                                minmult = multipliers[invalue];
+                                minmult = ezra_t_multipliers[invalue];
                         fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB];
                         break;
                 }
@@ -527,6 +527,18 @@ static unsigned int longhaul_get(unsigned int cpu)
         return calc_speed(longhaul_get_cpu_mult());
 }
 
+static acpi_status longhaul_walk_callback(acpi_handle obj_handle,
+                                          u32 nesting_level,
+                                          void *context, void **return_value)
+{
+        struct acpi_device *d;
+
+        if ( acpi_bus_get_device(obj_handle, &d) ) {
+                return 0;
+        }
+        *return_value = (void *)acpi_driver_data(d);
+        return 1;
+}
 
 static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
 {
@@ -534,6 +546,15 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
         char *cpuname=NULL;
         int ret;
 
+        /* Check ACPI support for C3 state */
+        acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX,
+                         &longhaul_walk_callback, NULL, (void *)&pr);
+        if (pr == NULL) goto err_acpi;
+
+        cx = &pr->power.states[ACPI_STATE_C3];
+        if (cx->address == 0 || cx->latency > 1000) goto err_acpi;
+
+        /* Now check what we have on this motherboard */
         switch (c->x86_model) {
         case 6:
                 cpu_model = CPU_SAMUEL;
@@ -634,6 +655,10 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
         cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
 
         return 0;
+
+err_acpi:
+        printk(KERN_ERR PFX "No ACPI support for CPU frequency changes.\n");
+        return -ENODEV;
 }
 
 static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
@@ -666,6 +691,18 @@ static int __init longhaul_init(void)
         if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6)
                 return -ENODEV;
 
+#ifdef CONFIG_SMP
+        if (num_online_cpus() > 1) {
+                return -ENODEV;
+                printk(KERN_ERR PFX "More than 1 CPU detected, longhaul disabled.\n");
+        }
+#endif
+#ifdef CONFIG_X86_IO_APIC
+        if (cpu_has_apic) {
+                printk(KERN_ERR PFX "APIC detected. Longhaul is currently broken in this configuration.\n");
+                return -ENODEV;
+        }
+#endif
         switch (c->x86_model) {
         case 6 ... 9:
                 return cpufreq_register_driver(&longhaul_driver);
@@ -699,6 +736,6 @@ MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>");
 MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors.");
 MODULE_LICENSE ("GPL");
 
-module_init(longhaul_init);
+late_initcall(longhaul_init);
 module_exit(longhaul_exit);
 
diff --git a/arch/i386/kernel/cpu/intel_cacheinfo.c b/arch/i386/kernel/cpu/intel_cacheinfo.c
index e9f0b928b0a9..5c43be47587f 100644
--- a/arch/i386/kernel/cpu/intel_cacheinfo.c
+++ b/arch/i386/kernel/cpu/intel_cacheinfo.c
@@ -759,7 +759,7 @@ static int __cpuinit cache_sysfs_init(void)
         if (num_cache_leaves == 0)
                 return 0;
 
-        register_cpu_notifier(&cacheinfo_cpu_notifier);
+        register_hotcpu_notifier(&cacheinfo_cpu_notifier);
 
         for_each_online_cpu(i) {
                 cacheinfo_cpu_callback(&cacheinfo_cpu_notifier, CPU_ONLINE,
diff --git a/arch/i386/kernel/cpu/mcheck/mce.h b/arch/i386/kernel/cpu/mcheck/mce.h
index dc2416dfef15..84fd4cf7d0fb 100644
--- a/arch/i386/kernel/cpu/mcheck/mce.h
+++ b/arch/i386/kernel/cpu/mcheck/mce.h
@@ -9,6 +9,6 @@ void winchip_mcheck_init(struct cpuinfo_x86 *c);
 /* Call the installed machine check handler for this CPU setup. */
 extern fastcall void (*machine_check_vector)(struct pt_regs *, long error_code);
 
-extern int mce_disabled __initdata;
+extern int mce_disabled;
 extern int nr_mce_banks;
 
diff --git a/arch/i386/kernel/entry.S b/arch/i386/kernel/entry.S
index d9a260f2efb4..37a7d2eaf4a0 100644
--- a/arch/i386/kernel/entry.S
+++ b/arch/i386/kernel/entry.S
@@ -204,7 +204,7 @@ VM_MASK		= 0x00020000
 ENTRY(ret_from_fork)
         CFI_STARTPROC
         pushl %eax
-        CFI_ADJUST_CFA_OFFSET -4
+        CFI_ADJUST_CFA_OFFSET 4
         call schedule_tail
         GET_THREAD_INFO(%ebp)
         popl %eax
diff --git a/arch/i386/kernel/kprobes.c b/arch/i386/kernel/kprobes.c
index de2e16e561c0..afe6505ca0b3 100644
--- a/arch/i386/kernel/kprobes.c
+++ b/arch/i386/kernel/kprobes.c
@@ -256,11 +256,6 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
         int ret = 0;
         kprobe_opcode_t *addr;
         struct kprobe_ctlblk *kcb;
-#ifdef CONFIG_PREEMPT
-        unsigned pre_preempt_count = preempt_count();
-#else
-        unsigned pre_preempt_count = 1;
-#endif
 
         addr = (kprobe_opcode_t *)(regs->eip - sizeof(kprobe_opcode_t));
 
@@ -338,13 +333,15 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
                 return 1;
 
 ss_probe:
-        if (pre_preempt_count && p->ainsn.boostable == 1 && !p->post_handler){
+#ifndef CONFIG_PREEMPT
+        if (p->ainsn.boostable == 1 && !p->post_handler){
                 /* Boost up -- we can execute copied instructions directly */
                 reset_current_kprobe();
                 regs->eip = (unsigned long)p->ainsn.insn;
                 preempt_enable_no_resched();
                 return 1;
         }
+#endif
         prepare_singlestep(p, regs);
         kcb->kprobe_status = KPROBE_HIT_SS;
         return 1;
diff --git a/arch/i386/kernel/machine_kexec.c b/arch/i386/kernel/machine_kexec.c
index 511abe52a94e..6b1ae6ba76f0 100644
--- a/arch/i386/kernel/machine_kexec.c
+++ b/arch/i386/kernel/machine_kexec.c
@@ -189,14 +189,11 @@ NORET_TYPE void machine_kexec(struct kimage *image)
         memcpy((void *)reboot_code_buffer, relocate_new_kernel,
                                                 relocate_new_kernel_size);
 
-        /* The segment registers are funny things, they are
-         * automatically loaded from a table, in memory wherever you
-         * set them to a specific selector, but this table is never
-         * accessed again you set the segment to a different selector.
-         *
-         * The more common model is are caches where the behide
-         * the scenes work is done, but is also dropped at arbitrary
-         * times.
+        /* The segment registers are funny things, they have both a
+         * visible and an invisible part.  Whenever the visible part is
+         * set to a specific selector, the invisible part is loaded
+         * with from a table in memory.  At no other time is the
+         * descriptor table in memory accessed.
          *
          * I take advantage of this here by force loading the
          * segments, before I zap the gdt with an invalid value.
diff --git a/arch/i386/kernel/nmi.c b/arch/i386/kernel/nmi.c
index 2dd928a84645..acb351478e42 100644
--- a/arch/i386/kernel/nmi.c
+++ b/arch/i386/kernel/nmi.c
@@ -575,6 +575,7 @@ void touch_nmi_watchdog (void)
          */
         touch_softlockup_watchdog();
 }
+EXPORT_SYMBOL(touch_nmi_watchdog);
 
 extern void die_nmi(struct pt_regs *, const char *msg);
 
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 6f5fea05f1d7..f948419c888a 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -212,14 +212,20 @@ valid_k7:
  * then we print a warning if not, and always resync.
  */
 
-static atomic_t tsc_start_flag = ATOMIC_INIT(0);
-static atomic_t tsc_count_start = ATOMIC_INIT(0);
-static atomic_t tsc_count_stop = ATOMIC_INIT(0);
-static unsigned long long tsc_values[NR_CPUS];
+static struct {
+        atomic_t start_flag;
+        atomic_t count_start;
+        atomic_t count_stop;
+        unsigned long long values[NR_CPUS];
+} tsc __initdata = {
+        .start_flag = ATOMIC_INIT(0),
+        .count_start = ATOMIC_INIT(0),
+        .count_stop = ATOMIC_INIT(0),
+};
 
 #define NR_LOOPS 5
 
-static void __init synchronize_tsc_bp (void)
+static void __init synchronize_tsc_bp(void)
 {
         int i;
         unsigned long long t0;
@@ -233,7 +239,7 @@ static void __init synchronize_tsc_bp (void)
         /* convert from kcyc/sec to cyc/usec */
         one_usec = cpu_khz / 1000;
 
-        atomic_set(&tsc_start_flag, 1);
+        atomic_set(&tsc.start_flag, 1);
         wmb();
 
         /*
@@ -250,16 +256,16 @@ static void __init synchronize_tsc_bp (void)
                 /*
                  * all APs synchronize but they loop on '== num_cpus'
                  */
-                while (atomic_read(&tsc_count_start) != num_booting_cpus()-1)
+                while (atomic_read(&tsc.count_start) != num_booting_cpus()-1)
                         cpu_relax();
-                atomic_set(&tsc_count_stop, 0);
+                atomic_set(&tsc.count_stop, 0);
                 wmb();
                 /*
                  * this lets the APs save their current TSC:
                  */
-                atomic_inc(&tsc_count_start);
+                atomic_inc(&tsc.count_start);
 
-                rdtscll(tsc_values[smp_processor_id()]);
+                rdtscll(tsc.values[smp_processor_id()]);
                 /*
                  * We clear the TSC in the last loop:
                  */
@@ -269,56 +275,54 @@ static void __init synchronize_tsc_bp (void)
                 /*
                  * Wait for all APs to leave the synchronization point:
                  */
-                while (atomic_read(&tsc_count_stop) != num_booting_cpus()-1)
+                while (atomic_read(&tsc.count_stop) != num_booting_cpus()-1)
                         cpu_relax();
-                atomic_set(&tsc_count_start, 0);
+                atomic_set(&tsc.count_start, 0);
                 wmb();
-                atomic_inc(&tsc_count_stop);
+                atomic_inc(&tsc.count_stop);
         }
 
         sum = 0;
         for (i = 0; i < NR_CPUS; i++) {
                 if (cpu_isset(i, cpu_callout_map)) {
-                        t0 = tsc_values[i];
+                        t0 = tsc.values[i];
                         sum += t0;
                 }
         }
         avg = sum;
         do_div(avg, num_booting_cpus());
 
-        sum = 0;
         for (i = 0; i < NR_CPUS; i++) {
                 if (!cpu_isset(i, cpu_callout_map))
                         continue;
-                delta = tsc_values[i] - avg;
+                delta = tsc.values[i] - avg;
                 if (delta < 0)
                         delta = -delta;
                 /*
                  * We report bigger than 2 microseconds clock differences.
                  */
                 if (delta > 2*one_usec) {
-                        long realdelta;
+                        long long realdelta;
+
                         if (!buggy) {
                                 buggy = 1;
                                 printk("\n");
                         }
                         realdelta = delta;
                         do_div(realdelta, one_usec);
-                        if (tsc_values[i] < avg)
+                        if (tsc.values[i] < avg)
                                 realdelta = -realdelta;
 
-                        if (realdelta > 0)
-                                printk(KERN_INFO "CPU#%d had %ld usecs TSC "
+                        if (realdelta)
+                                printk(KERN_INFO "CPU#%d had %Ld usecs TSC "
                                         "skew, fixed it up.\n", i, realdelta);
                 }
-
-                sum += delta;
         }
         if (!buggy)
                 printk("passed.\n");
 }
 
-static void __init synchronize_tsc_ap (void)
+static void __init synchronize_tsc_ap(void)
 {
         int i;
 
@@ -327,20 +331,20 @@ static void __init synchronize_tsc_ap (void)
          * this gets called, so we first wait for the BP to
          * finish SMP initialization:
          */
-        while (!atomic_read(&tsc_start_flag))
+        while (!atomic_read(&tsc.start_flag))
                 cpu_relax();
 
         for (i = 0; i < NR_LOOPS; i++) {
-                atomic_inc(&tsc_count_start);
-                while (atomic_read(&tsc_count_start) != num_booting_cpus())
+                atomic_inc(&tsc.count_start);
+                while (atomic_read(&tsc.count_start) != num_booting_cpus())
                         cpu_relax();
 
-                rdtscll(tsc_values[smp_processor_id()]);
+                rdtscll(tsc.values[smp_processor_id()]);
                 if (i == NR_LOOPS-1)
                         write_tsc(0, 0);
 
-                atomic_inc(&tsc_count_stop);
-                while (atomic_read(&tsc_count_stop) != num_booting_cpus())
+                atomic_inc(&tsc.count_stop);
+                while (atomic_read(&tsc.count_stop) != num_booting_cpus())
                         cpu_relax();
         }
 }
diff --git a/arch/i386/kernel/traps.c b/arch/i386/kernel/traps.c
index 021f8fdc7512..0d4005dc06c5 100644
--- a/arch/i386/kernel/traps.c
+++ b/arch/i386/kernel/traps.c
@@ -453,11 +453,9 @@ void die(const char * str, struct pt_regs * regs, long err)
         if (in_interrupt())
                 panic("Fatal exception in interrupt");
 
-        if (panic_on_oops) {
-                printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
-                ssleep(5);
-                panic("Fatal exception");
-        }
+        if (panic_on_oops)
+                panic("Fatal exception: panic_on_oops");
+
         oops_exit();
         do_exit(SIGSEGV);
 }
diff --git a/arch/i386/kernel/vsyscall.lds.S b/arch/i386/kernel/vsyscall.lds.S
index e26975fc68b6..f66cd11adb72 100644
--- a/arch/i386/kernel/vsyscall.lds.S
+++ b/arch/i386/kernel/vsyscall.lds.S
@@ -10,6 +10,7 @@ SECTIONS
   . = VDSO_PRELINK + SIZEOF_HEADERS;
 
   .hash           : { *(.hash) }                :text
+  .gnu.hash       : { *(.gnu.hash) }
   .dynsym         : { *(.dynsym) }
   .dynstr         : { *(.dynstr) }
   .gnu.version    : { *(.gnu.version) }