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authorZachary Amsden <zach@vmware.com>2005-09-03 18:56:38 -0400
committerLinus Torvalds <torvalds@evo.osdl.org>2005-09-05 03:06:11 -0400
commit4d37e7e3fd851428dede4d05d3e69d03795a744a (patch)
treef830928a0baf81f462bc9176dacbaad2dac2bb65 /arch/i386/power
parent245067d1674d451855692fcd4647daf9fd47f82d (diff)
[PATCH] i386: inline assembler: cleanup and encapsulate descriptor and task register management
i386 inline assembler cleanup. This change encapsulates descriptor and task register management. Also, it is possible to improve assembler generation in two cases; savesegment may store the value in a register instead of a memory location, which allows GCC to optimize stack variables into registers, and MOV MEM, SEG is always a 16-bit write to memory, making the casting in math-emu unnecessary. Signed-off-by: Zachary Amsden <zach@vmware.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/power')
-rw-r--r--arch/i386/power/cpu.c26
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index 4e19c43e0954..c7a6436aa938 100644
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -42,17 +42,17 @@ void __save_processor_state(struct saved_context *ctxt)
42 /* 42 /*
43 * descriptor tables 43 * descriptor tables
44 */ 44 */
45 asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit)); 45 store_gdt(&ctxt->gdt_limit);
46 asm volatile ("sidt %0" : "=m" (ctxt->idt_limit)); 46 store_idt(&ctxt->idt_limit);
47 asm volatile ("str %0" : "=m" (ctxt->tr)); 47 store_tr(ctxt->tr);
48 48
49 /* 49 /*
50 * segment registers 50 * segment registers
51 */ 51 */
52 asm volatile ("movw %%es, %0" : "=m" (ctxt->es)); 52 savesegment(es, ctxt->es);
53 asm volatile ("movw %%fs, %0" : "=m" (ctxt->fs)); 53 savesegment(fs, ctxt->fs);
54 asm volatile ("movw %%gs, %0" : "=m" (ctxt->gs)); 54 savesegment(gs, ctxt->gs);
55 asm volatile ("movw %%ss, %0" : "=m" (ctxt->ss)); 55 savesegment(ss, ctxt->ss);
56 56
57 /* 57 /*
58 * control registers 58 * control registers
@@ -118,16 +118,16 @@ void __restore_processor_state(struct saved_context *ctxt)
118 * now restore the descriptor tables to their proper values 118 * now restore the descriptor tables to their proper values
119 * ltr is done i fix_processor_context(). 119 * ltr is done i fix_processor_context().
120 */ 120 */
121 asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit)); 121 load_gdt(&ctxt->gdt_limit);
122 asm volatile ("lidt %0" :: "m" (ctxt->idt_limit)); 122 load_idt(&ctxt->idt_limit);
123 123
124 /* 124 /*
125 * segment registers 125 * segment registers
126 */ 126 */
127 asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); 127 loadsegment(es, ctxt->es);
128 asm volatile ("movw %0, %%fs" :: "r" (ctxt->fs)); 128 loadsegment(fs, ctxt->fs);
129 asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs)); 129 loadsegment(gs, ctxt->gs);
130 asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss)); 130 loadsegment(ss, ctxt->ss);
131 131
132 /* 132 /*
133 * sysenter MSRs 133 * sysenter MSRs