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authorPavel Machek <pavel@ucw.cz>2005-06-25 17:55:14 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-25 19:24:33 -0400
commit8d783b3e02002bce8cf9d4e4a82922ee7e59b1e5 (patch)
tree75c95b03d715caa1f5971b5c2182635618bdba0c /arch/i386/power
parentc61978b30322c83a94d7e4857fa5b9996b7d7931 (diff)
[PATCH] swsusp: clean assembly parts
This patch fixes register saving so that each register is only saved once, and adds missing saving of %cr8 on x86-64. Some reordering so that save/restore is more logical/safer (segment registers should be restored after gdt). Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/power')
-rw-r--r--arch/i386/power/cpu.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/arch/i386/power/cpu.c b/arch/i386/power/cpu.c
index d099d01461f4..0e6b45b61251 100644
--- a/arch/i386/power/cpu.c
+++ b/arch/i386/power/cpu.c
@@ -44,7 +44,6 @@ void __save_processor_state(struct saved_context *ctxt)
44 */ 44 */
45 asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit)); 45 asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
46 asm volatile ("sidt %0" : "=m" (ctxt->idt_limit)); 46 asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
47 asm volatile ("sldt %0" : "=m" (ctxt->ldt));
48 asm volatile ("str %0" : "=m" (ctxt->tr)); 47 asm volatile ("str %0" : "=m" (ctxt->tr));
49 48
50 /* 49 /*
@@ -107,7 +106,6 @@ static void fix_processor_context(void)
107 106
108void __restore_processor_state(struct saved_context *ctxt) 107void __restore_processor_state(struct saved_context *ctxt)
109{ 108{
110
111 /* 109 /*
112 * control registers 110 * control registers
113 */ 111 */
@@ -117,6 +115,13 @@ void __restore_processor_state(struct saved_context *ctxt)
117 asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0)); 115 asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0));
118 116
119 /* 117 /*
118 * now restore the descriptor tables to their proper values
119 * ltr is done i fix_processor_context().
120 */
121 asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
122 asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
123
124 /*
120 * segment registers 125 * segment registers
121 */ 126 */
122 asm volatile ("movw %0, %%es" :: "r" (ctxt->es)); 127 asm volatile ("movw %0, %%es" :: "r" (ctxt->es));
@@ -125,14 +130,6 @@ void __restore_processor_state(struct saved_context *ctxt)
125 asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss)); 130 asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
126 131
127 /* 132 /*
128 * now restore the descriptor tables to their proper values
129 * ltr is done i fix_processor_context().
130 */
131 asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
132 asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
133 asm volatile ("lldt %0" :: "m" (ctxt->ldt));
134
135 /*
136 * sysenter MSRs 133 * sysenter MSRs
137 */ 134 */
138 if (boot_cpu_has(X86_FEATURE_SEP)) 135 if (boot_cpu_has(X86_FEATURE_SEP))