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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 16:07:55 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 16:07:55 -0400
commitb278240839e20fa9384ea430df463b367b90e04e (patch)
treef99f0c8cdd4cc7f177cd75440e6bd181cded7fb3 /arch/i386/pci/mmconfig.c
parentdd77a4ee0f3981693d4229aa1d57cea9e526ff47 (diff)
parent3f75f42d7733e73aca5c78326489efd4189e0111 (diff)
Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits) [PATCH] Don't set calgary iommu as default y [PATCH] i386/x86-64: New Intel feature flags [PATCH] x86: Add a cumulative thermal throttle event counter. [PATCH] i386: Make the jiffies compares use the 64bit safe macros. [PATCH] x86: Refactor thermal throttle processing [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64) [PATCH] Fix unwinder warning in traps.c [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1 [PATCH] x86: Move direct PCI scanning functions out of line [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI [PATCH] Don't leak NT bit into next task [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder [PATCH] Fix some broken white space in ia32_signal.c [PATCH] Initialize argument registers for 32bit signal handlers. [PATCH] Remove all traces of signal number conversion [PATCH] Don't synchronize time reading on single core AMD systems [PATCH] Remove outdated comment in x86-64 mmconfig code [PATCH] Use string instructions for Core2 copy/clear [PATCH] x86: - restore i8259A eoi status on resume [PATCH] i386: Split multi-line printk in oops output. ...
Diffstat (limited to 'arch/i386/pci/mmconfig.c')
-rw-r--r--arch/i386/pci/mmconfig.c41
1 files changed, 39 insertions, 2 deletions
diff --git a/arch/i386/pci/mmconfig.c b/arch/i386/pci/mmconfig.c
index 972180f738d9..05be8db58a8c 100644
--- a/arch/i386/pci/mmconfig.c
+++ b/arch/i386/pci/mmconfig.c
@@ -151,6 +151,38 @@ static struct pci_raw_ops pci_mmcfg = {
151 .write = pci_mmcfg_write, 151 .write = pci_mmcfg_write,
152}; 152};
153 153
154
155static __init void pci_mmcfg_insert_resources(void)
156{
157#define PCI_MMCFG_RESOURCE_NAME_LEN 19
158 int i;
159 struct resource *res;
160 char *names;
161 unsigned num_buses;
162
163 res = kcalloc(PCI_MMCFG_RESOURCE_NAME_LEN + sizeof(*res),
164 pci_mmcfg_config_num, GFP_KERNEL);
165
166 if (!res) {
167 printk(KERN_ERR "PCI: Unable to allocate MMCONFIG resources\n");
168 return;
169 }
170
171 names = (void *)&res[pci_mmcfg_config_num];
172 for (i = 0; i < pci_mmcfg_config_num; i++, res++) {
173 num_buses = pci_mmcfg_config[i].end_bus_number -
174 pci_mmcfg_config[i].start_bus_number + 1;
175 res->name = names;
176 snprintf(names, PCI_MMCFG_RESOURCE_NAME_LEN, "PCI MMCONFIG %u",
177 pci_mmcfg_config[i].pci_segment_group_number);
178 res->start = pci_mmcfg_config[i].base_address;
179 res->end = res->start + (num_buses << 20) - 1;
180 res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
181 insert_resource(&iomem_resource, res);
182 names += PCI_MMCFG_RESOURCE_NAME_LEN;
183 }
184}
185
154/* K8 systems have some devices (typically in the builtin northbridge) 186/* K8 systems have some devices (typically in the builtin northbridge)
155 that are only accessible using type1 187 that are only accessible using type1
156 Normally this can be expressed in the MCFG by not listing them 188 Normally this can be expressed in the MCFG by not listing them
@@ -187,7 +219,9 @@ static __init void unreachable_devices(void)
187 } 219 }
188} 220}
189 221
190void __init pci_mmcfg_init(void) 222
223
224void __init pci_mmcfg_init(int type)
191{ 225{
192 if ((pci_probe & PCI_PROBE_MMCONF) == 0) 226 if ((pci_probe & PCI_PROBE_MMCONF) == 0)
193 return; 227 return;
@@ -198,7 +232,9 @@ void __init pci_mmcfg_init(void)
198 (pci_mmcfg_config[0].base_address == 0)) 232 (pci_mmcfg_config[0].base_address == 0))
199 return; 233 return;
200 234
201 if (!e820_all_mapped(pci_mmcfg_config[0].base_address, 235 /* Only do this check when type 1 works. If it doesn't work
236 assume we run on a Mac and always use MCFG */
237 if (type == 1 && !e820_all_mapped(pci_mmcfg_config[0].base_address,
202 pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN, 238 pci_mmcfg_config[0].base_address + MMCONFIG_APER_MIN,
203 E820_RESERVED)) { 239 E820_RESERVED)) {
204 printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n", 240 printk(KERN_ERR "PCI: BIOS Bug: MCFG area at %x is not E820-reserved\n",
@@ -212,4 +248,5 @@ void __init pci_mmcfg_init(void)
212 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF; 248 pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
213 249
214 unreachable_devices(); 250 unreachable_devices();
251 pci_mmcfg_insert_resources();
215} 252}