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authorRajesh Shah <rajesh.shah@intel.com>2006-05-03 18:27:47 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-06-21 14:59:59 -0400
commit53e4d30dd666d7f83598957ee4a415eefb47c9a6 (patch)
tree3fb71e7d79e6290ea7758ae45d297912a4407ae9 /arch/i386/pci/i386.c
parent9c273b95808c270149e9be9e172e4ef19f5d5c98 (diff)
[PATCH] PCI: i386/x86_84: disable PCI resource decode on device disable
When a PCI device is disabled via pci_disable_device(), it's still left decoding its BAR resource ranges even though its driver will have likely released those regions (and may even have unloaded). pci_enable_device() already explicitly enables BAR resource decode for the device being enabled. This patch disables resource decode for the PCI device being disabled, making it symmetric with the enable call. I saw this while doing something else, not because of a problem report. Still, seems to be the correct thing to do. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'arch/i386/pci/i386.c')
-rw-r--r--arch/i386/pci/i386.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c
index ed2c8c899bd3..7852827a599b 100644
--- a/arch/i386/pci/i386.c
+++ b/arch/i386/pci/i386.c
@@ -242,6 +242,15 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
242 return 0; 242 return 0;
243} 243}
244 244
245void pcibios_disable_resources(struct pci_dev *dev)
246{
247 u16 cmd;
248
249 pci_read_config_word(dev, PCI_COMMAND, &cmd);
250 cmd &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
251 pci_write_config_word(dev, PCI_COMMAND, cmd);
252}
253
245/* 254/*
246 * If we set up a device for bus mastering, we need to check the latency 255 * If we set up a device for bus mastering, we need to check the latency
247 * timer as certain crappy BIOSes forget to set it properly. 256 * timer as certain crappy BIOSes forget to set it properly.