Merge upstream 2.6.13-rc3 into ieee80211 branch of netdev-2.6.

22 files changed, 213 insertions, 66 deletions

diff --git a/arch/i386/kernel/acpi/Makefile b/arch/i386/kernel/acpi/Makefile
index ee75cb286cfe..5e291a20c03d 100644
--- a/arch/i386/kernel/acpi/Makefile
+++ b/arch/i386/kernel/acpi/Makefile
@@ -2,3 +2,7 @@ obj-$(CONFIG_ACPI_BOOT)		:= boot.o
 obj-$(CONFIG_X86_IO_APIC)       += earlyquirk.o
 obj-$(CONFIG_ACPI_SLEEP)        += sleep.o wakeup.o
 
+ifneq ($(CONFIG_ACPI_PROCESSOR),)
+obj-y                           += cstate.o
+endif
+
diff --git a/arch/i386/kernel/acpi/cstate.c b/arch/i386/kernel/acpi/cstate.c
new file mode 100644
index 000000000000..4c3036ba65df
--- /dev/null
+++ b/arch/i386/kernel/acpi/cstate.c
@@ -0,0 +1,103 @@
+/*
+ * arch/i386/kernel/acpi/cstate.c
+ *
+ * Copyright (C) 2005 Intel Corporation
+ *      Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
+ *      - Added _PDC for SMP C-states on Intel CPUs
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/acpi.h>
+
+#include <acpi/processor.h>
+#include <asm/acpi.h>
+
+static void acpi_processor_power_init_intel_pdc(struct acpi_processor_power
+                                                *pow)
+{
+        struct acpi_object_list *obj_list;
+        union acpi_object *obj;
+        u32 *buf;
+
+        /* allocate and initialize pdc. It will be used later. */
+        obj_list = kmalloc(sizeof(struct acpi_object_list), GFP_KERNEL);
+        if (!obj_list) {
+                printk(KERN_ERR "Memory allocation error\n");
+                return;
+        }
+
+        obj = kmalloc(sizeof(union acpi_object), GFP_KERNEL);
+        if (!obj) {
+                printk(KERN_ERR "Memory allocation error\n");
+                kfree(obj_list);
+                return;
+        }
+
+        buf = kmalloc(12, GFP_KERNEL);
+        if (!buf) {
+                printk(KERN_ERR "Memory allocation error\n");
+                kfree(obj);
+                kfree(obj_list);
+                return;
+        }
+
+        buf[0] = ACPI_PDC_REVISION_ID;
+        buf[1] = 1;
+        buf[2] = ACPI_PDC_C_CAPABILITY_SMP;
+
+        obj->type = ACPI_TYPE_BUFFER;
+        obj->buffer.length = 12;
+        obj->buffer.pointer = (u8 *) buf;
+        obj_list->count = 1;
+        obj_list->pointer = obj;
+        pow->pdc = obj_list;
+
+        return;
+}
+
+/* Initialize _PDC data based on the CPU vendor */
+void acpi_processor_power_init_pdc(struct acpi_processor_power *pow,
+                                   unsigned int cpu)
+{
+        struct cpuinfo_x86 *c = cpu_data + cpu;
+
+        pow->pdc = NULL;
+        if (c->x86_vendor == X86_VENDOR_INTEL)
+                acpi_processor_power_init_intel_pdc(pow);
+
+        return;
+}
+
+EXPORT_SYMBOL(acpi_processor_power_init_pdc);
+
+/*
+ * Initialize bm_flags based on the CPU cache properties
+ * On SMP it depends on cache configuration
+ * - When cache is not shared among all CPUs, we flush cache
+ *   before entering C3.
+ * - When cache is shared among all CPUs, we use bm_check
+ *   mechanism as in UP case
+ *
+ * This routine is called only after all the CPUs are online
+ */
+void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
+                                        unsigned int cpu)
+{
+        struct cpuinfo_x86 *c = cpu_data + cpu;
+
+        flags->bm_check = 0;
+        if (num_online_cpus() == 1)
+                flags->bm_check = 1;
+        else if (c->x86_vendor == X86_VENDOR_INTEL) {
+                /*
+                 * Today all CPUs that support C3 share cache.
+                 * TBD: This needs to look at cache shared map, once
+                 * multi-core detection patch makes to the base.
+                 */
+                flags->bm_check = 1;
+        }
+}
+
+EXPORT_SYMBOL(acpi_processor_power_init_bm_check);
diff --git a/arch/i386/kernel/acpi/wakeup.S b/arch/i386/kernel/acpi/wakeup.S
index 39d32484f6f5..44d886c745ec 100644
--- a/arch/i386/kernel/acpi/wakeup.S
+++ b/arch/i386/kernel/acpi/wakeup.S
@@ -74,8 +74,9 @@ wakeup_code:
         movw    %ax,%fs
         movw    $0x0e00 + 'i', %fs:(0x12)
         
-        # need a gdt
-        lgdt    real_save_gdt - wakeup_code
+        # need a gdt -- use lgdtl to force 32-bit operands, in case
+        # the GDT is located past 16 megabytes.
+        lgdtl   real_save_gdt - wakeup_code
 
         movl    real_save_cr0 - wakeup_code, %eax
         movl    %eax, %cr0
diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index 93df90bbb87e..bd1dbf3bd223 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -35,6 +35,7 @@
 #include <asm/desc.h>
 #include <asm/arch_hooks.h>
 #include <asm/hpet.h>
+#include <asm/i8253.h>
 
 #include <mach_apic.h>
 
@@ -879,7 +880,6 @@ fake_ioapic_page:
  */
 static unsigned int __devinit get_8254_timer_count(void)
 {
-        extern spinlock_t i8253_lock;
         unsigned long flags;
 
         unsigned int count;
diff --git a/arch/i386/kernel/apm.c b/arch/i386/kernel/apm.c
index d48ce9290963..064211d5f41b 100644
--- a/arch/i386/kernel/apm.c
+++ b/arch/i386/kernel/apm.c
@@ -228,10 +228,10 @@
 #include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/desc.h>
+#include <asm/i8253.h>
 
 #include "io_ports.h"
 
-extern spinlock_t i8253_lock;
 extern unsigned long get_cmos_time(void);
 extern void machine_real_restart(unsigned char *, int);
 
@@ -1168,8 +1168,7 @@ static void get_time_diff(void)
 static void reinit_timer(void)
 {
 #ifdef INIT_TIMER_AFTER_SUSPEND
-        unsigned long   flags;
-        extern spinlock_t i8253_lock;
+        unsigned long flags;
 
         spin_lock_irqsave(&i8253_lock, flags);
         /* set the clock to 100 Hz */
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 2203a9d20212..4553ffd94b1f 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -435,6 +435,11 @@ void __devinit identify_cpu(struct cpuinfo_x86 *c)
         if (c == &boot_cpu_data)
                 sysenter_setup();
         enable_sep_cpu();
+
+        if (c == &boot_cpu_data)
+                mtrr_bp_init();
+        else
+                mtrr_ap_init();
 }
 
 #ifdef CONFIG_X86_HT
diff --git a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
index 1a49adb1f4a6..e86ea486c311 100644
--- a/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
+++ b/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
@@ -190,7 +190,7 @@ static __init struct pci_dev *gx_detect_chipset(void)
 
         /* detect which companion chip is used */
         while ((gx_pci = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, gx_pci)) != NULL) {
-                if ((pci_match_device (gx_chipset_tbl, gx_pci)) != NULL) {
+                if ((pci_match_id(gx_chipset_tbl, gx_pci)) != NULL) {
                         return gx_pci;
                 }
         }
diff --git a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
index 7dcbf70fc16f..327a55d4d1c6 100644
--- a/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
+++ b/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c
@@ -375,7 +375,7 @@ static int centrino_cpu_init_acpi(struct cpufreq_policy *policy)
         arg0.buffer.pointer = (u8 *) arg0_buf;
         arg0_buf[0] = ACPI_PDC_REVISION_ID;
         arg0_buf[1] = 1;
-        arg0_buf[2] = ACPI_PDC_EST_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_MSR;
+        arg0_buf[2] = ACPI_PDC_EST_CAPABILITY_SMP_MSR;
 
         p.pdc = &arg_list;
 
diff --git a/arch/i386/kernel/cpu/intel.c b/arch/i386/kernel/cpu/intel.c
index 96a75d045835..a2c33c1a46c5 100644
--- a/arch/i386/kernel/cpu/intel.c
+++ b/arch/i386/kernel/cpu/intel.c
@@ -25,7 +25,7 @@ extern int trap_init_f00f_bug(void);
 /*
  * Alignment at which movsl is preferred for bulk memory copies.
  */
-struct movsl_mask movsl_mask;
+struct movsl_mask movsl_mask __read_mostly;
 #endif
 
 void __devinit early_intel_workaround(struct cpuinfo_x86 *c)
diff --git a/arch/i386/kernel/cpu/mtrr/generic.c b/arch/i386/kernel/cpu/mtrr/generic.c
index 64d91f73a0a4..169ac8e0db68 100644
--- a/arch/i386/kernel/cpu/mtrr/generic.c
+++ b/arch/i386/kernel/cpu/mtrr/generic.c
@@ -67,13 +67,6 @@ void __init get_mtrr_state(void)
         mtrr_state.enabled = (lo & 0xc00) >> 10;
 }
 
-/*  Free resources associated with a struct mtrr_state  */
-void __init finalize_mtrr_state(void)
-{
-        kfree(mtrr_state.var_ranges);
-        mtrr_state.var_ranges = NULL;
-}
-
 /*  Some BIOS's are fucked and don't set all MTRRs the same!  */
 void __init mtrr_state_warn(void)
 {
@@ -334,6 +327,9 @@ static void generic_set_mtrr(unsigned int reg, unsigned long base,
 */
 {
         unsigned long flags;
+        struct mtrr_var_range *vr;
+
+        vr = &mtrr_state.var_ranges[reg];
 
         local_irq_save(flags);
         prepare_set();
@@ -342,11 +338,15 @@ static void generic_set_mtrr(unsigned int reg, unsigned long base,
                 /* The invalid bit is kept in the mask, so we simply clear the
                    relevant mask register to disable a range. */
                 mtrr_wrmsr(MTRRphysMask_MSR(reg), 0, 0);
+                memset(vr, 0, sizeof(struct mtrr_var_range));
         } else {
-                mtrr_wrmsr(MTRRphysBase_MSR(reg), base << PAGE_SHIFT | type,
-                      (base & size_and_mask) >> (32 - PAGE_SHIFT));
-                mtrr_wrmsr(MTRRphysMask_MSR(reg), -size << PAGE_SHIFT | 0x800,
-                      (-size & size_and_mask) >> (32 - PAGE_SHIFT));
+                vr->base_lo = base << PAGE_SHIFT | type;
+                vr->base_hi = (base & size_and_mask) >> (32 - PAGE_SHIFT);
+                vr->mask_lo = -size << PAGE_SHIFT | 0x800;
+                vr->mask_hi = (-size & size_and_mask) >> (32 - PAGE_SHIFT);
+
+                mtrr_wrmsr(MTRRphysBase_MSR(reg), vr->base_lo, vr->base_hi);
+                mtrr_wrmsr(MTRRphysMask_MSR(reg), vr->mask_lo, vr->mask_hi);
         }
 
         post_set();
diff --git a/arch/i386/kernel/cpu/mtrr/main.c b/arch/i386/kernel/cpu/mtrr/main.c
index d66b09e0c820..764cac64e211 100644
--- a/arch/i386/kernel/cpu/mtrr/main.c
+++ b/arch/i386/kernel/cpu/mtrr/main.c
@@ -332,6 +332,8 @@ int mtrr_add_page(unsigned long base, unsigned long size,
 
         error = -EINVAL;
 
+        /* No CPU hotplug when we change MTRR entries */
+        lock_cpu_hotplug();
         /*  Search for existing MTRR  */
         down(&main_lock);
         for (i = 0; i < num_var_ranges; ++i) {
@@ -372,6 +374,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
         error = i;
  out:
         up(&main_lock);
+        unlock_cpu_hotplug();
         return error;
 }
 
@@ -461,6 +464,8 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
                 return -ENXIO;
 
         max = num_var_ranges;
+        /* No CPU hotplug when we change MTRR entries */
+        lock_cpu_hotplug();
         down(&main_lock);
         if (reg < 0) {
                 /*  Search for existing MTRR  */
@@ -501,6 +506,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
         error = reg;
  out:
         up(&main_lock);
+        unlock_cpu_hotplug();
         return error;
 }
 /**
@@ -544,21 +550,9 @@ static void __init init_ifs(void)
         centaur_init_mtrr();
 }
 
-static void __init init_other_cpus(void)
-{
-        if (use_intel())
-                get_mtrr_state();
-
-        /* bring up the other processors */
-        set_mtrr(~0U,0,0,0);
-
-        if (use_intel()) {
-                finalize_mtrr_state();
-                mtrr_state_warn();
-        }
-}
-
-
+/* The suspend/resume methods are only for CPU without MTRR. CPU using generic
+ * MTRR driver doesn't require this
+ */
 struct mtrr_value {
         mtrr_type       ltype;
         unsigned long   lbase;
@@ -611,13 +605,13 @@ static struct sysdev_driver mtrr_sysdev_driver = {
 
 
 /**
- * mtrr_init - initialize mtrrs on the boot CPU
+ * mtrr_bp_init - initialize mtrrs on the boot CPU
  *
  * This needs to be called early; before any of the other CPUs are 
  * initialized (i.e. before smp_init()).
  * 
  */
-static int __init mtrr_init(void)
+void __init mtrr_bp_init(void)
 {
         init_ifs();
 
@@ -674,12 +668,48 @@ static int __init mtrr_init(void)
         if (mtrr_if) {
                 set_num_var_ranges();
                 init_table();
-                init_other_cpus();
-
-                return sysdev_driver_register(&cpu_sysdev_class,
-                                              &mtrr_sysdev_driver);
+                if (use_intel())
+                        get_mtrr_state();
         }
-        return -ENXIO;
 }
 
-subsys_initcall(mtrr_init);
+void mtrr_ap_init(void)
+{
+        unsigned long flags;
+
+        if (!mtrr_if || !use_intel())
+                return;
+        /*
+         * Ideally we should hold main_lock here to avoid mtrr entries changed,
+         * but this routine will be called in cpu boot time, holding the lock
+         * breaks it. This routine is called in two cases: 1.very earily time
+         * of software resume, when there absolutely isn't mtrr entry changes;
+         * 2.cpu hotadd time. We let mtrr_add/del_page hold cpuhotplug lock to
+         * prevent mtrr entry changes
+         */
+        local_irq_save(flags);
+
+        mtrr_if->set_all();
+
+        local_irq_restore(flags);
+}
+
+static int __init mtrr_init_finialize(void)
+{
+        if (!mtrr_if)
+                return 0;
+        if (use_intel())
+                mtrr_state_warn();
+        else {
+                /* The CPUs haven't MTRR and seemes not support SMP. They have
+                 * specific drivers, we use a tricky method to support
+                 * suspend/resume for them.
+                 * TBD: is there any system with such CPU which supports
+                 * suspend/resume?  if no, we should remove the code.
+                 */
+                sysdev_driver_register(&cpu_sysdev_class,
+                        &mtrr_sysdev_driver);
+        }
+        return 0;
+}
+subsys_initcall(mtrr_init_finialize);
diff --git a/arch/i386/kernel/cpu/mtrr/mtrr.h b/arch/i386/kernel/cpu/mtrr/mtrr.h
index de1351245599..99c9f2682041 100644
--- a/arch/i386/kernel/cpu/mtrr/mtrr.h
+++ b/arch/i386/kernel/cpu/mtrr/mtrr.h
@@ -91,7 +91,6 @@ extern struct mtrr_ops * mtrr_if;
 
 extern unsigned int num_var_ranges;
 
-void finalize_mtrr_state(void);
 void mtrr_state_warn(void);
 char *mtrr_attrib_to_str(int x);
 void mtrr_wrmsr(unsigned, unsigned, unsigned);
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 35eb8e29c485..6578f40bd501 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -37,6 +37,7 @@
 #include <asm/smp.h>
 #include <asm/desc.h>
 #include <asm/timer.h>
+#include <asm/i8259.h>
 
 #include <mach_apic.h>
 
@@ -1566,7 +1567,6 @@ void print_all_local_APICs (void)
 
 void /*__init*/ print_PIC(void)
 {
-        extern spinlock_t i8259A_lock;
         unsigned int v;
         unsigned long flags;
 
diff --git a/arch/i386/kernel/kprobes.c b/arch/i386/kernel/kprobes.c
index fc8b17521761..a6d8c45961d3 100644
--- a/arch/i386/kernel/kprobes.c
+++ b/arch/i386/kernel/kprobes.c
@@ -537,7 +537,7 @@ static struct kprobe trampoline_p = {
         .pre_handler = trampoline_probe_handler
 };
 
-int __init arch_init(void)
+int __init arch_init_kprobes(void)
 {
         return register_kprobe(&trampoline_p);
 }
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index d66bf489a2e9..8ac8e9fd5614 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -68,21 +68,21 @@ EXPORT_SYMBOL(smp_num_siblings);
 #endif
 
 /* Package ID of each logical CPU */
-int phys_proc_id[NR_CPUS] = {[0 ... NR_CPUS-1] = BAD_APICID};
+int phys_proc_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID};
 EXPORT_SYMBOL(phys_proc_id);
 
 /* Core ID of each logical CPU */
-int cpu_core_id[NR_CPUS] = {[0 ... NR_CPUS-1] = BAD_APICID};
+int cpu_core_id[NR_CPUS] __read_mostly = {[0 ... NR_CPUS-1] = BAD_APICID};
 EXPORT_SYMBOL(cpu_core_id);
 
-cpumask_t cpu_sibling_map[NR_CPUS];
+cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
 EXPORT_SYMBOL(cpu_sibling_map);
 
-cpumask_t cpu_core_map[NR_CPUS];
+cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
 EXPORT_SYMBOL(cpu_core_map);
 
 /* bitmap of online cpus */
-cpumask_t cpu_online_map;
+cpumask_t cpu_online_map __read_mostly;
 EXPORT_SYMBOL(cpu_online_map);
 
 cpumask_t cpu_callin_map;
@@ -100,7 +100,7 @@ static int __devinitdata tsc_sync_disabled;
 struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
 EXPORT_SYMBOL(cpu_data);
 
-u8 x86_cpu_to_apicid[NR_CPUS] =
+u8 x86_cpu_to_apicid[NR_CPUS] __read_mostly =
                         { [0 ... NR_CPUS-1] = 0xff };
 EXPORT_SYMBOL(x86_cpu_to_apicid);
 
@@ -550,10 +550,10 @@ extern struct {
 #ifdef CONFIG_NUMA
 
 /* which logical CPUs are on which nodes */
-cpumask_t node_2_cpu_mask[MAX_NUMNODES] =
+cpumask_t node_2_cpu_mask[MAX_NUMNODES] __read_mostly =
                                 { [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
 /* which node each logical CPU is on */
-int cpu_2_node[NR_CPUS] = { [0 ... NR_CPUS-1] = 0 };
+int cpu_2_node[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
 EXPORT_SYMBOL(cpu_2_node);
 
 /* set up a mapping between cpu and node. */
@@ -581,7 +581,7 @@ static inline void unmap_cpu_to_node(int cpu)
 
 #endif /* CONFIG_NUMA */
 
-u8 cpu_2_logical_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = BAD_APICID };
+u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
 
 static void map_cpu_to_logical_apicid(void)
 {
diff --git a/arch/i386/kernel/syscall_table.S b/arch/i386/kernel/syscall_table.S
index 3db9a04aec6e..468500a7e894 100644
--- a/arch/i386/kernel/syscall_table.S
+++ b/arch/i386/kernel/syscall_table.S
@@ -291,3 +291,6 @@ ENTRY(sys_call_table)
         .long sys_keyctl
         .long sys_ioprio_set
         .long sys_ioprio_get            /* 290 */
+        .long sys_inotify_init
+        .long sys_inotify_add_watch
+        .long sys_inotify_rm_watch
diff --git a/arch/i386/kernel/time.c b/arch/i386/kernel/time.c
index e68d9fdb0759..0ee9dee8af06 100644
--- a/arch/i386/kernel/time.c
+++ b/arch/i386/kernel/time.c
@@ -68,7 +68,8 @@
 
 #include "io_ports.h"
 
-extern spinlock_t i8259A_lock;
+#include <asm/i8259.h>
+
 int pit_latch_buggy;              /* extern */
 
 #include "do_timer.h"
@@ -85,10 +86,12 @@ extern unsigned long wall_jiffies;
 DEFINE_SPINLOCK(rtc_lock);
 EXPORT_SYMBOL(rtc_lock);
 
+#include <asm/i8253.h>
+
 DEFINE_SPINLOCK(i8253_lock);
 EXPORT_SYMBOL(i8253_lock);
 
-struct timer_opts *cur_timer = &timer_none;
+struct timer_opts *cur_timer __read_mostly = &timer_none;
 
 /*
  * This is a special lock that is owned by the CPU and holds the index
diff --git a/arch/i386/kernel/timers/timer_cyclone.c b/arch/i386/kernel/timers/timer_cyclone.c
index f6f1206a11bb..13892a65c941 100644
--- a/arch/i386/kernel/timers/timer_cyclone.c
+++ b/arch/i386/kernel/timers/timer_cyclone.c
@@ -17,9 +17,9 @@
 #include <asm/io.h>
 #include <asm/pgtable.h>
 #include <asm/fixmap.h>
-#include "io_ports.h"
+#include <asm/i8253.h>
 
-extern spinlock_t i8253_lock;
+#include "io_ports.h"
 
 /* Number of usecs that the last interrupt was delayed */
 static int delay_at_last_interrupt;
diff --git a/arch/i386/kernel/timers/timer_hpet.c b/arch/i386/kernel/timers/timer_hpet.c
index d766e0963ac1..ef8dac5dd33b 100644
--- a/arch/i386/kernel/timers/timer_hpet.c
+++ b/arch/i386/kernel/timers/timer_hpet.c
@@ -18,7 +18,7 @@
 #include "mach_timer.h"
 #include <asm/hpet.h>
 
-static unsigned long hpet_usec_quotient;        /* convert hpet clks to usec */
+static unsigned long __read_mostly hpet_usec_quotient;  /* convert hpet clks to usec */
 static unsigned long tsc_hpet_quotient;         /* convert tsc to hpet clks */
 static unsigned long hpet_last;         /* hpet counter value at last tick*/
 static unsigned long last_tsc_low;      /* lsb 32 bits of Time Stamp Counter */
@@ -180,7 +180,7 @@ static int __init init_hpet(char* override)
 /************************************************************/
 
 /* tsc timer_opts struct */
-static struct timer_opts timer_hpet = {
+static struct timer_opts timer_hpet __read_mostly = {
         .name =                 "hpet",
         .mark_offset =          mark_offset_hpet,
         .get_offset =           get_offset_hpet,
diff --git a/arch/i386/kernel/timers/timer_pit.c b/arch/i386/kernel/timers/timer_pit.c
index 967d5453cd0e..06de036a820c 100644
--- a/arch/i386/kernel/timers/timer_pit.c
+++ b/arch/i386/kernel/timers/timer_pit.c
@@ -15,9 +15,8 @@
 #include <asm/smp.h>
 #include <asm/io.h>
 #include <asm/arch_hooks.h>
+#include <asm/i8253.h>
 
-extern spinlock_t i8259A_lock;
-extern spinlock_t i8253_lock;
 #include "do_timer.h"
 #include "io_ports.h"
 
@@ -166,7 +165,6 @@ struct init_timer_opts __initdata timer_pit_init = {
 
 void setup_pit_timer(void)
 {
-        extern spinlock_t i8253_lock;
         unsigned long flags;
 
         spin_lock_irqsave(&i8253_lock, flags);
diff --git a/arch/i386/kernel/timers/timer_tsc.c b/arch/i386/kernel/timers/timer_tsc.c
index f46e625bab67..8f4e4d5bc560 100644
--- a/arch/i386/kernel/timers/timer_tsc.c
+++ b/arch/i386/kernel/timers/timer_tsc.c
@@ -24,6 +24,7 @@
 #include "mach_timer.h"
 
 #include <asm/hpet.h>
+#include <asm/i8253.h>
 
 #ifdef CONFIG_HPET_TIMER
 static unsigned long hpet_usec_quotient;
@@ -35,8 +36,6 @@ static inline void cpufreq_delayed_get(void);
 
 int tsc_disable __devinitdata = 0;
 
-extern spinlock_t i8253_lock;
-
 static int use_tsc;
 /* Number of usecs that the last interrupt was delayed */
 static int delay_at_last_interrupt;
diff --git a/arch/i386/kernel/vmlinux.lds.S b/arch/i386/kernel/vmlinux.lds.S
index 7e01a528a83a..761972f8cb6c 100644
--- a/arch/i386/kernel/vmlinux.lds.S
+++ b/arch/i386/kernel/vmlinux.lds.S
@@ -57,6 +57,9 @@ SECTIONS
         *(.data.cacheline_aligned)
   }
 
+  /* rarely changed data like cpu maps */
+  . = ALIGN(32);
+  .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET) { *(.data.read_mostly) }
   _edata = .;                   /* End of data section */
 
   . = ALIGN(THREAD_SIZE);       /* init_task */