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authorLi Shaohua <shaohua.li@intel.com>2005-06-25 17:54:55 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-06-25 19:24:30 -0400
commit0bb3184df537002a742bafddf3f4fb482b7fe610 (patch)
tree97fb252be7efd6d111edbb9c2efb3bb04442c0ec /arch/i386/kernel/smpboot.c
parentd720803a9365d360b3e5ea02033f0c11b5b1226a (diff)
[PATCH] init call cleanup
Trival patch for CPU hotplug. In CPU identify part, only did cleaup for intel CPUs. Need do for other CPUs if they support S3 SMP. Signed-off-by: Li Shaohua<shaohua.li@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/smpboot.c')
-rw-r--r--arch/i386/kernel/smpboot.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/arch/i386/kernel/smpboot.c b/arch/i386/kernel/smpboot.c
index 09b4ceb832b2..fb0b200d1d85 100644
--- a/arch/i386/kernel/smpboot.c
+++ b/arch/i386/kernel/smpboot.c
@@ -59,7 +59,7 @@
59#include <smpboot_hooks.h> 59#include <smpboot_hooks.h>
60 60
61/* Set if we find a B stepping CPU */ 61/* Set if we find a B stepping CPU */
62static int __initdata smp_b_stepping; 62static int __devinitdata smp_b_stepping;
63 63
64/* Number of siblings per CPU package */ 64/* Number of siblings per CPU package */
65int smp_num_siblings = 1; 65int smp_num_siblings = 1;
@@ -118,7 +118,7 @@ DEFINE_PER_CPU(int, cpu_state) = { 0 };
118 * has made sure it's suitably aligned. 118 * has made sure it's suitably aligned.
119 */ 119 */
120 120
121static unsigned long __init setup_trampoline(void) 121static unsigned long __devinit setup_trampoline(void)
122{ 122{
123 memcpy(trampoline_base, trampoline_data, trampoline_end - trampoline_data); 123 memcpy(trampoline_base, trampoline_data, trampoline_end - trampoline_data);
124 return virt_to_phys(trampoline_base); 124 return virt_to_phys(trampoline_base);
@@ -148,7 +148,7 @@ void __init smp_alloc_memory(void)
148 * a given CPU 148 * a given CPU
149 */ 149 */
150 150
151static void __init smp_store_cpu_info(int id) 151static void __devinit smp_store_cpu_info(int id)
152{ 152{
153 struct cpuinfo_x86 *c = cpu_data + id; 153 struct cpuinfo_x86 *c = cpu_data + id;
154 154
@@ -342,7 +342,7 @@ extern void calibrate_delay(void);
342 342
343static atomic_t init_deasserted; 343static atomic_t init_deasserted;
344 344
345static void __init smp_callin(void) 345static void __devinit smp_callin(void)
346{ 346{
347 int cpuid, phys_id; 347 int cpuid, phys_id;
348 unsigned long timeout; 348 unsigned long timeout;
@@ -468,7 +468,7 @@ set_cpu_sibling_map(int cpu)
468/* 468/*
469 * Activate a secondary processor. 469 * Activate a secondary processor.
470 */ 470 */
471static void __init start_secondary(void *unused) 471static void __devinit start_secondary(void *unused)
472{ 472{
473 /* 473 /*
474 * Dont put anything before smp_callin(), SMP 474 * Dont put anything before smp_callin(), SMP
@@ -521,7 +521,7 @@ static void __init start_secondary(void *unused)
521 * from the task structure 521 * from the task structure
522 * This function must not return. 522 * This function must not return.
523 */ 523 */
524void __init initialize_secondary(void) 524void __devinit initialize_secondary(void)
525{ 525{
526 /* 526 /*
527 * We don't actually need to load the full TSS, 527 * We don't actually need to load the full TSS,
@@ -635,7 +635,7 @@ static inline void __inquire_remote_apic(int apicid)
635 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this 635 * INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
636 * won't ... remember to clear down the APIC, etc later. 636 * won't ... remember to clear down the APIC, etc later.
637 */ 637 */
638static int __init 638static int __devinit
639wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip) 639wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
640{ 640{
641 unsigned long send_status = 0, accept_status = 0; 641 unsigned long send_status = 0, accept_status = 0;
@@ -681,7 +681,7 @@ wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
681#endif /* WAKE_SECONDARY_VIA_NMI */ 681#endif /* WAKE_SECONDARY_VIA_NMI */
682 682
683#ifdef WAKE_SECONDARY_VIA_INIT 683#ifdef WAKE_SECONDARY_VIA_INIT
684static int __init 684static int __devinit
685wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip) 685wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
686{ 686{
687 unsigned long send_status = 0, accept_status = 0; 687 unsigned long send_status = 0, accept_status = 0;
@@ -817,7 +817,7 @@ wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
817 817
818extern cpumask_t cpu_initialized; 818extern cpumask_t cpu_initialized;
819 819
820static int __init do_boot_cpu(int apicid) 820static int __devinit do_boot_cpu(int apicid)
821/* 821/*
822 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad 822 * NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
823 * (ie clustered apic addressing mode), this is a LOGICAL apic ID. 823 * (ie clustered apic addressing mode), this is a LOGICAL apic ID.