Linux-2.6.12-rc2v2.6.12-rc2

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!

1 files changed, 52 insertions, 0 deletions

diff --git a/arch/i386/kernel/quirks.c b/arch/i386/kernel/quirks.c
new file mode 100644
index 000000000000..aaf89cb2bc51
--- /dev/null
+++ b/arch/i386/kernel/quirks.c
@@ -0,0 +1,52 @@
+/*
+ * This file contains work-arounds for x86 and x86_64 platform bugs.
+ */
+#include <linux/config.h>
+#include <linux/pci.h>
+#include <linux/irq.h>
+
+#if defined(CONFIG_X86_IO_APIC) && defined(CONFIG_SMP) && defined(CONFIG_PCI)
+
+static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
+{
+        u8 config, rev;
+        u32 word;
+
+        /* BIOS may enable hardware IRQ balancing for
+         * E7520/E7320/E7525(revision ID 0x9 and below)
+         * based platforms.
+         * Disable SW irqbalance/affinity on those platforms.
+         */
+        pci_read_config_byte(dev, PCI_CLASS_REVISION, &rev);
+        if (rev > 0x9)
+                return;
+
+        printk(KERN_INFO "Intel E7520/7320/7525 detected.");
+
+        /* enable access to config space*/
+        pci_read_config_byte(dev, 0xf4, &config);
+        config |= 0x2;
+        pci_write_config_byte(dev, 0xf4, config);
+
+        /* read xTPR register */
+        raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);
+
+        if (!(word & (1 << 13))) {
+                printk(KERN_INFO "Disabling irq balancing and affinity\n");
+#ifdef CONFIG_IRQBALANCE
+                irqbalance_disable("");
+#endif
+                noirqdebug_setup("");
+#ifdef CONFIG_PROC_FS
+                no_irq_affinity = 1;
+#endif
+        }
+
+        config &= ~0x2;
+        /* disable access to config space*/
+        pci_write_config_byte(dev, 0xf4, config);
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7320_MCH,  quirk_intel_irqbalance);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7525_MCH,  quirk_intel_irqbalance);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL,    PCI_DEVICE_ID_INTEL_E7520_MCH,  quirk_intel_irqbalance);
+#endif