diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /arch/i386/kernel/msr.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'arch/i386/kernel/msr.c')
-rw-r--r-- | arch/i386/kernel/msr.c | 346 |
1 files changed, 346 insertions, 0 deletions
diff --git a/arch/i386/kernel/msr.c b/arch/i386/kernel/msr.c new file mode 100644 index 000000000000..05d9f8f363a6 --- /dev/null +++ b/arch/i386/kernel/msr.c | |||
@@ -0,0 +1,346 @@ | |||
1 | /* ----------------------------------------------------------------------- * | ||
2 | * | ||
3 | * Copyright 2000 H. Peter Anvin - All Rights Reserved | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation, Inc., 675 Mass Ave, Cambridge MA 02139, | ||
8 | * USA; either version 2 of the License, or (at your option) any later | ||
9 | * version; incorporated herein by reference. | ||
10 | * | ||
11 | * ----------------------------------------------------------------------- */ | ||
12 | |||
13 | /* | ||
14 | * msr.c | ||
15 | * | ||
16 | * x86 MSR access device | ||
17 | * | ||
18 | * This device is accessed by lseek() to the appropriate register number | ||
19 | * and then read/write in chunks of 8 bytes. A larger size means multiple | ||
20 | * reads or writes of the same register. | ||
21 | * | ||
22 | * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on | ||
23 | * an SMP box will direct the access to CPU %d. | ||
24 | */ | ||
25 | |||
26 | #include <linux/module.h> | ||
27 | #include <linux/config.h> | ||
28 | |||
29 | #include <linux/types.h> | ||
30 | #include <linux/errno.h> | ||
31 | #include <linux/fcntl.h> | ||
32 | #include <linux/init.h> | ||
33 | #include <linux/poll.h> | ||
34 | #include <linux/smp.h> | ||
35 | #include <linux/smp_lock.h> | ||
36 | #include <linux/major.h> | ||
37 | #include <linux/fs.h> | ||
38 | #include <linux/device.h> | ||
39 | #include <linux/cpu.h> | ||
40 | #include <linux/notifier.h> | ||
41 | |||
42 | #include <asm/processor.h> | ||
43 | #include <asm/msr.h> | ||
44 | #include <asm/uaccess.h> | ||
45 | #include <asm/system.h> | ||
46 | |||
47 | static struct class_simple *msr_class; | ||
48 | |||
49 | /* Note: "err" is handled in a funny way below. Otherwise one version | ||
50 | of gcc or another breaks. */ | ||
51 | |||
52 | static inline int wrmsr_eio(u32 reg, u32 eax, u32 edx) | ||
53 | { | ||
54 | int err; | ||
55 | |||
56 | asm volatile ("1: wrmsr\n" | ||
57 | "2:\n" | ||
58 | ".section .fixup,\"ax\"\n" | ||
59 | "3: movl %4,%0\n" | ||
60 | " jmp 2b\n" | ||
61 | ".previous\n" | ||
62 | ".section __ex_table,\"a\"\n" | ||
63 | " .align 4\n" " .long 1b,3b\n" ".previous":"=&bDS" (err) | ||
64 | :"a"(eax), "d"(edx), "c"(reg), "i"(-EIO), "0"(0)); | ||
65 | |||
66 | return err; | ||
67 | } | ||
68 | |||
69 | static inline int rdmsr_eio(u32 reg, u32 *eax, u32 *edx) | ||
70 | { | ||
71 | int err; | ||
72 | |||
73 | asm volatile ("1: rdmsr\n" | ||
74 | "2:\n" | ||
75 | ".section .fixup,\"ax\"\n" | ||
76 | "3: movl %4,%0\n" | ||
77 | " jmp 2b\n" | ||
78 | ".previous\n" | ||
79 | ".section __ex_table,\"a\"\n" | ||
80 | " .align 4\n" | ||
81 | " .long 1b,3b\n" | ||
82 | ".previous":"=&bDS" (err), "=a"(*eax), "=d"(*edx) | ||
83 | :"c"(reg), "i"(-EIO), "0"(0)); | ||
84 | |||
85 | return err; | ||
86 | } | ||
87 | |||
88 | #ifdef CONFIG_SMP | ||
89 | |||
90 | struct msr_command { | ||
91 | int cpu; | ||
92 | int err; | ||
93 | u32 reg; | ||
94 | u32 data[2]; | ||
95 | }; | ||
96 | |||
97 | static void msr_smp_wrmsr(void *cmd_block) | ||
98 | { | ||
99 | struct msr_command *cmd = (struct msr_command *)cmd_block; | ||
100 | |||
101 | if (cmd->cpu == smp_processor_id()) | ||
102 | cmd->err = wrmsr_eio(cmd->reg, cmd->data[0], cmd->data[1]); | ||
103 | } | ||
104 | |||
105 | static void msr_smp_rdmsr(void *cmd_block) | ||
106 | { | ||
107 | struct msr_command *cmd = (struct msr_command *)cmd_block; | ||
108 | |||
109 | if (cmd->cpu == smp_processor_id()) | ||
110 | cmd->err = rdmsr_eio(cmd->reg, &cmd->data[0], &cmd->data[1]); | ||
111 | } | ||
112 | |||
113 | static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) | ||
114 | { | ||
115 | struct msr_command cmd; | ||
116 | int ret; | ||
117 | |||
118 | preempt_disable(); | ||
119 | if (cpu == smp_processor_id()) { | ||
120 | ret = wrmsr_eio(reg, eax, edx); | ||
121 | } else { | ||
122 | cmd.cpu = cpu; | ||
123 | cmd.reg = reg; | ||
124 | cmd.data[0] = eax; | ||
125 | cmd.data[1] = edx; | ||
126 | |||
127 | smp_call_function(msr_smp_wrmsr, &cmd, 1, 1); | ||
128 | ret = cmd.err; | ||
129 | } | ||
130 | preempt_enable(); | ||
131 | return ret; | ||
132 | } | ||
133 | |||
134 | static inline int do_rdmsr(int cpu, u32 reg, u32 * eax, u32 * edx) | ||
135 | { | ||
136 | struct msr_command cmd; | ||
137 | int ret; | ||
138 | |||
139 | preempt_disable(); | ||
140 | if (cpu == smp_processor_id()) { | ||
141 | ret = rdmsr_eio(reg, eax, edx); | ||
142 | } else { | ||
143 | cmd.cpu = cpu; | ||
144 | cmd.reg = reg; | ||
145 | |||
146 | smp_call_function(msr_smp_rdmsr, &cmd, 1, 1); | ||
147 | |||
148 | *eax = cmd.data[0]; | ||
149 | *edx = cmd.data[1]; | ||
150 | |||
151 | ret = cmd.err; | ||
152 | } | ||
153 | preempt_enable(); | ||
154 | return ret; | ||
155 | } | ||
156 | |||
157 | #else /* ! CONFIG_SMP */ | ||
158 | |||
159 | static inline int do_wrmsr(int cpu, u32 reg, u32 eax, u32 edx) | ||
160 | { | ||
161 | return wrmsr_eio(reg, eax, edx); | ||
162 | } | ||
163 | |||
164 | static inline int do_rdmsr(int cpu, u32 reg, u32 *eax, u32 *edx) | ||
165 | { | ||
166 | return rdmsr_eio(reg, eax, edx); | ||
167 | } | ||
168 | |||
169 | #endif /* ! CONFIG_SMP */ | ||
170 | |||
171 | static loff_t msr_seek(struct file *file, loff_t offset, int orig) | ||
172 | { | ||
173 | loff_t ret = -EINVAL; | ||
174 | |||
175 | lock_kernel(); | ||
176 | switch (orig) { | ||
177 | case 0: | ||
178 | file->f_pos = offset; | ||
179 | ret = file->f_pos; | ||
180 | break; | ||
181 | case 1: | ||
182 | file->f_pos += offset; | ||
183 | ret = file->f_pos; | ||
184 | } | ||
185 | unlock_kernel(); | ||
186 | return ret; | ||
187 | } | ||
188 | |||
189 | static ssize_t msr_read(struct file *file, char __user * buf, | ||
190 | size_t count, loff_t * ppos) | ||
191 | { | ||
192 | u32 __user *tmp = (u32 __user *) buf; | ||
193 | u32 data[2]; | ||
194 | size_t rv; | ||
195 | u32 reg = *ppos; | ||
196 | int cpu = iminor(file->f_dentry->d_inode); | ||
197 | int err; | ||
198 | |||
199 | if (count % 8) | ||
200 | return -EINVAL; /* Invalid chunk size */ | ||
201 | |||
202 | for (rv = 0; count; count -= 8) { | ||
203 | err = do_rdmsr(cpu, reg, &data[0], &data[1]); | ||
204 | if (err) | ||
205 | return err; | ||
206 | if (copy_to_user(tmp, &data, 8)) | ||
207 | return -EFAULT; | ||
208 | tmp += 2; | ||
209 | } | ||
210 | |||
211 | return ((char __user *)tmp) - buf; | ||
212 | } | ||
213 | |||
214 | static ssize_t msr_write(struct file *file, const char __user *buf, | ||
215 | size_t count, loff_t *ppos) | ||
216 | { | ||
217 | const u32 __user *tmp = (const u32 __user *)buf; | ||
218 | u32 data[2]; | ||
219 | size_t rv; | ||
220 | u32 reg = *ppos; | ||
221 | int cpu = iminor(file->f_dentry->d_inode); | ||
222 | int err; | ||
223 | |||
224 | if (count % 8) | ||
225 | return -EINVAL; /* Invalid chunk size */ | ||
226 | |||
227 | for (rv = 0; count; count -= 8) { | ||
228 | if (copy_from_user(&data, tmp, 8)) | ||
229 | return -EFAULT; | ||
230 | err = do_wrmsr(cpu, reg, data[0], data[1]); | ||
231 | if (err) | ||
232 | return err; | ||
233 | tmp += 2; | ||
234 | } | ||
235 | |||
236 | return ((char __user *)tmp) - buf; | ||
237 | } | ||
238 | |||
239 | static int msr_open(struct inode *inode, struct file *file) | ||
240 | { | ||
241 | unsigned int cpu = iminor(file->f_dentry->d_inode); | ||
242 | struct cpuinfo_x86 *c = &(cpu_data)[cpu]; | ||
243 | |||
244 | if (cpu >= NR_CPUS || !cpu_online(cpu)) | ||
245 | return -ENXIO; /* No such CPU */ | ||
246 | if (!cpu_has(c, X86_FEATURE_MSR)) | ||
247 | return -EIO; /* MSR not supported */ | ||
248 | |||
249 | return 0; | ||
250 | } | ||
251 | |||
252 | /* | ||
253 | * File operations we support | ||
254 | */ | ||
255 | static struct file_operations msr_fops = { | ||
256 | .owner = THIS_MODULE, | ||
257 | .llseek = msr_seek, | ||
258 | .read = msr_read, | ||
259 | .write = msr_write, | ||
260 | .open = msr_open, | ||
261 | }; | ||
262 | |||
263 | static int msr_class_simple_device_add(int i) | ||
264 | { | ||
265 | int err = 0; | ||
266 | struct class_device *class_err; | ||
267 | |||
268 | class_err = class_simple_device_add(msr_class, MKDEV(MSR_MAJOR, i), NULL, "msr%d",i); | ||
269 | if (IS_ERR(class_err)) | ||
270 | err = PTR_ERR(class_err); | ||
271 | return err; | ||
272 | } | ||
273 | |||
274 | static int __devinit msr_class_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) | ||
275 | { | ||
276 | unsigned int cpu = (unsigned long)hcpu; | ||
277 | |||
278 | switch (action) { | ||
279 | case CPU_ONLINE: | ||
280 | msr_class_simple_device_add(cpu); | ||
281 | break; | ||
282 | case CPU_DEAD: | ||
283 | class_simple_device_remove(MKDEV(MSR_MAJOR, cpu)); | ||
284 | break; | ||
285 | } | ||
286 | return NOTIFY_OK; | ||
287 | } | ||
288 | |||
289 | static struct notifier_block msr_class_cpu_notifier = | ||
290 | { | ||
291 | .notifier_call = msr_class_cpu_callback, | ||
292 | }; | ||
293 | |||
294 | static int __init msr_init(void) | ||
295 | { | ||
296 | int i, err = 0; | ||
297 | i = 0; | ||
298 | |||
299 | if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) { | ||
300 | printk(KERN_ERR "msr: unable to get major %d for msr\n", | ||
301 | MSR_MAJOR); | ||
302 | err = -EBUSY; | ||
303 | goto out; | ||
304 | } | ||
305 | msr_class = class_simple_create(THIS_MODULE, "msr"); | ||
306 | if (IS_ERR(msr_class)) { | ||
307 | err = PTR_ERR(msr_class); | ||
308 | goto out_chrdev; | ||
309 | } | ||
310 | for_each_online_cpu(i) { | ||
311 | err = msr_class_simple_device_add(i); | ||
312 | if (err != 0) | ||
313 | goto out_class; | ||
314 | } | ||
315 | register_cpu_notifier(&msr_class_cpu_notifier); | ||
316 | |||
317 | err = 0; | ||
318 | goto out; | ||
319 | |||
320 | out_class: | ||
321 | i = 0; | ||
322 | for_each_online_cpu(i) | ||
323 | class_simple_device_remove(MKDEV(MSR_MAJOR, i)); | ||
324 | class_simple_destroy(msr_class); | ||
325 | out_chrdev: | ||
326 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); | ||
327 | out: | ||
328 | return err; | ||
329 | } | ||
330 | |||
331 | static void __exit msr_exit(void) | ||
332 | { | ||
333 | int cpu = 0; | ||
334 | for_each_online_cpu(cpu) | ||
335 | class_simple_device_remove(MKDEV(MSR_MAJOR, cpu)); | ||
336 | class_simple_destroy(msr_class); | ||
337 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); | ||
338 | unregister_cpu_notifier(&msr_class_cpu_notifier); | ||
339 | } | ||
340 | |||
341 | module_init(msr_init); | ||
342 | module_exit(msr_exit) | ||
343 | |||
344 | MODULE_AUTHOR("H. Peter Anvin <hpa@zytor.com>"); | ||
345 | MODULE_DESCRIPTION("x86 generic MSR driver"); | ||
346 | MODULE_LICENSE("GPL"); | ||