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authorEric W. Biederman <ebiederm@xmission.com>2006-11-08 20:44:57 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-11-08 21:29:24 -0500
commitec68307cc5a8dc499e48693843bb42f6b6028458 (patch)
treeba735cbdc35819837bc53ef1385a478f5800fd7a /arch/i386/kernel/io_apic.c
parent64d9fe6973a9348e5211f3cc9f04b899329caeb4 (diff)
[PATCH] htirq: refactor so we only have one function that writes to the chip
This refactoring actually optimizes the code a little by caching the value that we think the device is programmed with instead of reading it back from the hardware. Which simplifies the code a little and should speed things up a bit. This patch introduces the concept of a ht_irq_msg and modifies the architecture read/write routines to update this code. There is a minor consistency fix here as well as x86_64 forgot to initialize the htirq as masked. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Andi Kleen <ak@suse.de> Acked-by: Bryan O'Sullivan <bos@pathscale.com> Cc: <olson@pathscale.com> Cc: Roland Dreier <rolandd@cisco.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/io_apic.c')
-rw-r--r--arch/i386/kernel/io_apic.c26
1 files changed, 12 insertions, 14 deletions
diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c
index 507983c513c3..ad84bc2802a6 100644
--- a/arch/i386/kernel/io_apic.c
+++ b/arch/i386/kernel/io_apic.c
@@ -2624,18 +2624,16 @@ void arch_teardown_msi_irq(unsigned int irq)
2624 2624
2625static void target_ht_irq(unsigned int irq, unsigned int dest) 2625static void target_ht_irq(unsigned int irq, unsigned int dest)
2626{ 2626{
2627 u32 low, high; 2627 struct ht_irq_msg msg;
2628 low = read_ht_irq_low(irq); 2628 fetch_ht_irq_msg(irq, &msg);
2629 high = read_ht_irq_high(irq);
2630 2629
2631 low &= ~(HT_IRQ_LOW_DEST_ID_MASK); 2630 msg.address_lo &= ~(HT_IRQ_LOW_DEST_ID_MASK);
2632 high &= ~(HT_IRQ_HIGH_DEST_ID_MASK); 2631 msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK);
2633 2632
2634 low |= HT_IRQ_LOW_DEST_ID(dest); 2633 msg.address_lo |= HT_IRQ_LOW_DEST_ID(dest);
2635 high |= HT_IRQ_HIGH_DEST_ID(dest); 2634 msg.address_hi |= HT_IRQ_HIGH_DEST_ID(dest);
2636 2635
2637 write_ht_irq_low(irq, low); 2636 write_ht_irq_msg(irq, &msg);
2638 write_ht_irq_high(irq, high);
2639} 2637}
2640 2638
2641static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask) 2639static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
@@ -2673,7 +2671,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
2673 2671
2674 vector = assign_irq_vector(irq); 2672 vector = assign_irq_vector(irq);
2675 if (vector >= 0) { 2673 if (vector >= 0) {
2676 u32 low, high; 2674 struct ht_irq_msg msg;
2677 unsigned dest; 2675 unsigned dest;
2678 cpumask_t tmp; 2676 cpumask_t tmp;
2679 2677
@@ -2681,9 +2679,10 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
2681 cpu_set(vector >> 8, tmp); 2679 cpu_set(vector >> 8, tmp);
2682 dest = cpu_mask_to_apicid(tmp); 2680 dest = cpu_mask_to_apicid(tmp);
2683 2681
2684 high = HT_IRQ_HIGH_DEST_ID(dest); 2682 msg.address_hi = HT_IRQ_HIGH_DEST_ID(dest);
2685 2683
2686 low = HT_IRQ_LOW_BASE | 2684 msg.address_lo =
2685 HT_IRQ_LOW_BASE |
2687 HT_IRQ_LOW_DEST_ID(dest) | 2686 HT_IRQ_LOW_DEST_ID(dest) |
2688 HT_IRQ_LOW_VECTOR(vector) | 2687 HT_IRQ_LOW_VECTOR(vector) |
2689 ((INT_DEST_MODE == 0) ? 2688 ((INT_DEST_MODE == 0) ?
@@ -2695,8 +2694,7 @@ int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev)
2695 HT_IRQ_LOW_MT_ARBITRATED) | 2694 HT_IRQ_LOW_MT_ARBITRATED) |
2696 HT_IRQ_LOW_IRQ_MASKED; 2695 HT_IRQ_LOW_IRQ_MASKED;
2697 2696
2698 write_ht_irq_low(irq, low); 2697 write_ht_irq_msg(irq, &msg);
2699 write_ht_irq_high(irq, high);
2700 2698
2701 set_irq_chip_and_handler_name(irq, &ht_irq_chip, 2699 set_irq_chip_and_handler_name(irq, &ht_irq_chip,
2702 handle_edge_irq, "edge"); 2700 handle_edge_irq, "edge");