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authorThomas Gleixner <tglx@linutronix.de>2007-10-11 05:11:50 -0400
committerThomas Gleixner <tglx@linutronix.de>2007-10-11 05:11:50 -0400
commitd07ec74041a48f2ce47aa254e716e1e2c17a1191 (patch)
treee8a974b9b09814c215dfea22204532952b62ab43 /arch/i386/kernel/i8253.c
parent6513b15625b19abf8397a1a7099a61c453783e01 (diff)
i386: prepare shared kernel/i8253.c
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/i386/kernel/i8253.c')
-rw-r--r--arch/i386/kernel/i8253.c206
1 files changed, 0 insertions, 206 deletions
diff --git a/arch/i386/kernel/i8253.c b/arch/i386/kernel/i8253.c
deleted file mode 100644
index 6d839f2f1b1a..000000000000
--- a/arch/i386/kernel/i8253.c
+++ /dev/null
@@ -1,206 +0,0 @@
1/*
2 * i8253.c 8253/PIT functions
3 *
4 */
5#include <linux/clockchips.h>
6#include <linux/init.h>
7#include <linux/interrupt.h>
8#include <linux/jiffies.h>
9#include <linux/module.h>
10#include <linux/spinlock.h>
11
12#include <asm/smp.h>
13#include <asm/delay.h>
14#include <asm/i8253.h>
15#include <asm/io.h>
16#include <asm/timer.h>
17
18DEFINE_SPINLOCK(i8253_lock);
19EXPORT_SYMBOL(i8253_lock);
20
21/*
22 * HPET replaces the PIT, when enabled. So we need to know, which of
23 * the two timers is used
24 */
25struct clock_event_device *global_clock_event;
26
27/*
28 * Initialize the PIT timer.
29 *
30 * This is also called after resume to bring the PIT into operation again.
31 */
32static void init_pit_timer(enum clock_event_mode mode,
33 struct clock_event_device *evt)
34{
35 unsigned long flags;
36
37 spin_lock_irqsave(&i8253_lock, flags);
38
39 switch(mode) {
40 case CLOCK_EVT_MODE_PERIODIC:
41 /* binary, mode 2, LSB/MSB, ch 0 */
42 outb_p(0x34, PIT_MODE);
43 outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
44 outb(LATCH >> 8 , PIT_CH0); /* MSB */
45 break;
46
47 case CLOCK_EVT_MODE_SHUTDOWN:
48 case CLOCK_EVT_MODE_UNUSED:
49 if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
50 evt->mode == CLOCK_EVT_MODE_ONESHOT) {
51 outb_p(0x30, PIT_MODE);
52 outb_p(0, PIT_CH0);
53 outb_p(0, PIT_CH0);
54 }
55 break;
56
57 case CLOCK_EVT_MODE_ONESHOT:
58 /* One shot setup */
59 outb_p(0x38, PIT_MODE);
60 break;
61
62 case CLOCK_EVT_MODE_RESUME:
63 /* Nothing to do here */
64 break;
65 }
66 spin_unlock_irqrestore(&i8253_lock, flags);
67}
68
69/*
70 * Program the next event in oneshot mode
71 *
72 * Delta is given in PIT ticks
73 */
74static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
75{
76 unsigned long flags;
77
78 spin_lock_irqsave(&i8253_lock, flags);
79 outb_p(delta & 0xff , PIT_CH0); /* LSB */
80 outb(delta >> 8 , PIT_CH0); /* MSB */
81 spin_unlock_irqrestore(&i8253_lock, flags);
82
83 return 0;
84}
85
86/*
87 * On UP the PIT can serve all of the possible timer functions. On SMP systems
88 * it can be solely used for the global tick.
89 *
90 * The profiling and update capabilites are switched off once the local apic is
91 * registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
92 * !using_apic_timer decisions in do_timer_interrupt_hook()
93 */
94struct clock_event_device pit_clockevent = {
95 .name = "pit",
96 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
97 .set_mode = init_pit_timer,
98 .set_next_event = pit_next_event,
99 .shift = 32,
100 .irq = 0,
101};
102
103/*
104 * Initialize the conversion factor and the min/max deltas of the clock event
105 * structure and register the clock event source with the framework.
106 */
107void __init setup_pit_timer(void)
108{
109 /*
110 * Start pit with the boot cpu mask and make it global after the
111 * IO_APIC has been initialized.
112 */
113 pit_clockevent.cpumask = cpumask_of_cpu(smp_processor_id());
114 pit_clockevent.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, 32);
115 pit_clockevent.max_delta_ns =
116 clockevent_delta2ns(0x7FFF, &pit_clockevent);
117 pit_clockevent.min_delta_ns =
118 clockevent_delta2ns(0xF, &pit_clockevent);
119 clockevents_register_device(&pit_clockevent);
120 global_clock_event = &pit_clockevent;
121}
122
123/*
124 * Since the PIT overflows every tick, its not very useful
125 * to just read by itself. So use jiffies to emulate a free
126 * running counter:
127 */
128static cycle_t pit_read(void)
129{
130 unsigned long flags;
131 int count;
132 u32 jifs;
133 static int old_count;
134 static u32 old_jifs;
135
136 spin_lock_irqsave(&i8253_lock, flags);
137 /*
138 * Although our caller may have the read side of xtime_lock,
139 * this is now a seqlock, and we are cheating in this routine
140 * by having side effects on state that we cannot undo if
141 * there is a collision on the seqlock and our caller has to
142 * retry. (Namely, old_jifs and old_count.) So we must treat
143 * jiffies as volatile despite the lock. We read jiffies
144 * before latching the timer count to guarantee that although
145 * the jiffies value might be older than the count (that is,
146 * the counter may underflow between the last point where
147 * jiffies was incremented and the point where we latch the
148 * count), it cannot be newer.
149 */
150 jifs = jiffies;
151 outb_p(0x00, PIT_MODE); /* latch the count ASAP */
152 count = inb_p(PIT_CH0); /* read the latched count */
153 count |= inb_p(PIT_CH0) << 8;
154
155 /* VIA686a test code... reset the latch if count > max + 1 */
156 if (count > LATCH) {
157 outb_p(0x34, PIT_MODE);
158 outb_p(LATCH & 0xff, PIT_CH0);
159 outb(LATCH >> 8, PIT_CH0);
160 count = LATCH - 1;
161 }
162
163 /*
164 * It's possible for count to appear to go the wrong way for a
165 * couple of reasons:
166 *
167 * 1. The timer counter underflows, but we haven't handled the
168 * resulting interrupt and incremented jiffies yet.
169 * 2. Hardware problem with the timer, not giving us continuous time,
170 * the counter does small "jumps" upwards on some Pentium systems,
171 * (see c't 95/10 page 335 for Neptun bug.)
172 *
173 * Previous attempts to handle these cases intelligently were
174 * buggy, so we just do the simple thing now.
175 */
176 if (count > old_count && jifs == old_jifs) {
177 count = old_count;
178 }
179 old_count = count;
180 old_jifs = jifs;
181
182 spin_unlock_irqrestore(&i8253_lock, flags);
183
184 count = (LATCH - 1) - count;
185
186 return (cycle_t)(jifs * LATCH) + count;
187}
188
189static struct clocksource clocksource_pit = {
190 .name = "pit",
191 .rating = 110,
192 .read = pit_read,
193 .mask = CLOCKSOURCE_MASK(32),
194 .mult = 0,
195 .shift = 20,
196};
197
198static int __init init_pit_clocksource(void)
199{
200 if (num_possible_cpus() > 1) /* PIT does not scale! */
201 return 0;
202
203 clocksource_pit.mult = clocksource_hz2mult(CLOCK_TICK_RATE, 20);
204 return clocksource_register(&clocksource_pit);
205}
206arch_initcall(init_pit_clocksource);
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