[PATCH] Base support for AMD Geode GX/LX processors

Provide basic support for the AMD Geode GX and LX processors.

Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

2 files changed, 32 insertions, 2 deletions

diff --git a/arch/i386/kernel/cpu/amd.c b/arch/i386/kernel/cpu/amd.c
index e344ef88cfcd..e7697e077f6b 100644
--- a/arch/i386/kernel/cpu/amd.c
+++ b/arch/i386/kernel/cpu/amd.c
@@ -161,8 +161,13 @@ static void __init init_amd(struct cpuinfo_x86 *c)
                                         set_bit(X86_FEATURE_K6_MTRR, c->x86_capability);
                                 break;
                         }
-                        break;
 
+                        if (c->x86_model == 10) {
+                                /* AMD Geode LX is model 10 */
+                                /* placeholder for any needed mods */
+                                break;
+                        }
+                        break;
                 case 6: /* An Athlon/Duron */
  
                         /* Bit 15 of Athlon specific MSR 15, needs to be 0
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index ff87cc22b323..75015975d038 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -343,6 +343,31 @@ static void __init init_cyrix(struct cpuinfo_x86 *c)
 }
 
 /*
+ * Handle National Semiconductor branded processors
+ */
+static void __devinit init_nsc(struct cpuinfo_x86 *c)
+{
+        /* There may be GX1 processors in the wild that are branded
+         * NSC and not Cyrix.
+         *
+         * This function only handles the GX processor, and kicks every
+         * thing else to the Cyrix init function above - that should
+         * cover any processors that might have been branded differently
+         * after NSC aquired Cyrix.
+         *
+         * If this breaks your GX1 horribly, please e-mail
+         * info-linux@ldcmail.amd.com to tell us.
+         */
+
+        /* Handle the GX (Formally known as the GX2) */
+
+        if (c->x86 == 5 && c->x86_model == 5)
+                display_cacheinfo(c);
+        else
+                init_cyrix(c);
+}
+
+/*
  * Cyrix CPUs without cpuid or with cpuid not yet enabled can be detected
  * by the fact that they preserve the flags across the division of 5/2.
  * PII and PPro exhibit this behavior too, but they have cpuid available.
@@ -422,7 +447,7 @@ int __init cyrix_init_cpu(void)
 static struct cpu_dev nsc_cpu_dev __initdata = {
         .c_vendor       = "NSC",
         .c_ident        = { "Geode by NSC" },
-        .c_init         = init_cyrix,
+        .c_init         = init_nsc,
         .c_identify     = generic_identify,
 };