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authorLinus Torvalds <torvalds@g5.osdl.org>2005-07-29 13:16:25 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-29 13:16:25 -0400
commit33ac02aa4cef417871e128ab4a6565e751e5f3b2 (patch)
tree000243cf3b1477eafb09d86207fdf199ec7f142b /arch/i386/kernel/cpu
parente0d7ff168a71299919f01500b3d507aae0c67513 (diff)
parent2bcad935a3bb149833bf249e6b159f22a90d6218 (diff)
Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/cpufreq
Diffstat (limited to 'arch/i386/kernel/cpu')
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k8.c35
-rw-r--r--arch/i386/kernel/cpu/cpufreq/powernow-k8.h32
2 files changed, 36 insertions, 31 deletions
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
index 31f65c8a4c24..de5deebc0154 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * (c) 2003, 2004 Advanced Micro Devices, Inc. 2 * (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the 3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or 4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html 5 * http://www.gnu.org/licenses/gpl.html
@@ -44,7 +44,7 @@
44 44
45#define PFX "powernow-k8: " 45#define PFX "powernow-k8: "
46#define BFX PFX "BIOS error: " 46#define BFX PFX "BIOS error: "
47#define VERSION "version 1.40.2" 47#define VERSION "version 1.50.3"
48#include "powernow-k8.h" 48#include "powernow-k8.h"
49 49
50/* serialize freq changes */ 50/* serialize freq changes */
@@ -231,7 +231,7 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid)
231/* 231/*
232 * Reduce the vid by the max of step or reqvid. 232 * Reduce the vid by the max of step or reqvid.
233 * Decreasing vid codes represent increasing voltages: 233 * Decreasing vid codes represent increasing voltages:
234 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of 0x1f is off. 234 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
235 */ 235 */
236static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step) 236static int decrease_vid_code_by_step(struct powernow_k8_data *data, u32 reqvid, u32 step)
237{ 237{
@@ -466,7 +466,7 @@ static int check_supported_cpu(unsigned int cpu)
466 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); 466 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
467 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || 467 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
468 ((eax & CPUID_XFAM) != CPUID_XFAM_K8) || 468 ((eax & CPUID_XFAM) != CPUID_XFAM_K8) ||
469 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_E)) { 469 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_F)) {
470 printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax); 470 printk(KERN_INFO PFX "Processor cpuid %x not supported\n", eax);
471 goto out; 471 goto out;
472 } 472 }
@@ -695,6 +695,7 @@ static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, unsigned
695 695
696 data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK; 696 data->irt = (data->acpi_data.states[index].control >> IRT_SHIFT) & IRT_MASK;
697 data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK; 697 data->rvo = (data->acpi_data.states[index].control >> RVO_SHIFT) & RVO_MASK;
698 data->exttype = (data->acpi_data.states[index].control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
698 data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK; 699 data->plllock = (data->acpi_data.states[index].control >> PLL_L_SHIFT) & PLL_L_MASK;
699 data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK); 700 data->vidmvs = 1 << ((data->acpi_data.states[index].control >> MVS_SHIFT) & MVS_MASK);
700 data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK; 701 data->vstable = (data->acpi_data.states[index].control >> VST_SHIFT) & VST_MASK;
@@ -734,8 +735,13 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
734 } 735 }
735 736
736 for (i = 0; i < data->acpi_data.state_count; i++) { 737 for (i = 0; i < data->acpi_data.state_count; i++) {
737 u32 fid = data->acpi_data.states[i].control & FID_MASK; 738 if (data->exttype) {
738 u32 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK; 739 u32 fid = data->acpi_data.states[i].status & FID_MASK;
740 u32 vid = (data->acpi_data.states[i].status >> VID_SHIFT) & VID_MASK;
741 } else {
742 u32 fid = data->acpi_data.states[i].control & FID_MASK;
743 u32 vid = (data->acpi_data.states[i].control >> VID_SHIFT) & VID_MASK;
744 }
739 745
740 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); 746 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
741 747
@@ -752,7 +758,7 @@ static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
752 } 758 }
753 759
754 /* verify voltage is OK - BIOSs are using "off" to indicate invalid */ 760 /* verify voltage is OK - BIOSs are using "off" to indicate invalid */
755 if (vid == 0x1f) { 761 if (vid == VID_OFF) {
756 dprintk("invalid vid %u, ignoring\n", vid); 762 dprintk("invalid vid %u, ignoring\n", vid);
757 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID; 763 powernow_table[i].frequency = CPUFREQ_ENTRY_INVALID;
758 continue; 764 continue;
@@ -929,15 +935,6 @@ static int powernowk8_target(struct cpufreq_policy *pol, unsigned targfreq, unsi
929 935
930 down(&fidvid_sem); 936 down(&fidvid_sem);
931 937
932 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
933 /* make sure the sibling is initialized */
934 if (!powernow_data[i]) {
935 ret = 0;
936 up(&fidvid_sem);
937 goto err_out;
938 }
939 }
940
941 powernow_k8_acpi_pst_values(data, newstate); 938 powernow_k8_acpi_pst_values(data, newstate);
942 939
943 if (transition_frequency(data, newstate)) { 940 if (transition_frequency(data, newstate)) {
@@ -977,7 +974,7 @@ static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
977{ 974{
978 struct powernow_k8_data *data; 975 struct powernow_k8_data *data;
979 cpumask_t oldmask = CPU_MASK_ALL; 976 cpumask_t oldmask = CPU_MASK_ALL;
980 int rc; 977 int rc, i;
981 978
982 if (!check_supported_cpu(pol->cpu)) 979 if (!check_supported_cpu(pol->cpu))
983 return -ENODEV; 980 return -ENODEV;
@@ -1063,7 +1060,9 @@ static int __init powernowk8_cpu_init(struct cpufreq_policy *pol)
1063 printk("cpu_init done, current fid 0x%x, vid 0x%x\n", 1060 printk("cpu_init done, current fid 0x%x, vid 0x%x\n",
1064 data->currfid, data->currvid); 1061 data->currfid, data->currvid);
1065 1062
1066 powernow_data[pol->cpu] = data; 1063 for_each_cpu_mask(i, cpu_core_map[pol->cpu]) {
1064 powernow_data[i] = data;
1065 }
1067 1066
1068 return 0; 1067 return 0;
1069 1068
diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
index 9ed5bf221cb7..b1e85bb36396 100644
--- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
+++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * (c) 2003, 2004 Advanced Micro Devices, Inc. 2 * (c) 2003, 2004, 2005 Advanced Micro Devices, Inc.
3 * Your use of this code is subject to the terms and conditions of the 3 * Your use of this code is subject to the terms and conditions of the
4 * GNU general public license version 2. See "COPYING" or 4 * GNU general public license version 2. See "COPYING" or
5 * http://www.gnu.org/licenses/gpl.html 5 * http://www.gnu.org/licenses/gpl.html
@@ -19,6 +19,7 @@ struct powernow_k8_data {
19 u32 vidmvs; /* usable value calculated from mvs */ 19 u32 vidmvs; /* usable value calculated from mvs */
20 u32 vstable; /* voltage stabilization time, units 20 us */ 20 u32 vstable; /* voltage stabilization time, units 20 us */
21 u32 plllock; /* pll lock time, units 1 us */ 21 u32 plllock; /* pll lock time, units 1 us */
22 u32 exttype; /* extended interface = 1 */
22 23
23 /* keep track of the current fid / vid */ 24 /* keep track of the current fid / vid */
24 u32 currvid, currfid; 25 u32 currvid, currfid;
@@ -41,7 +42,7 @@ struct powernow_k8_data {
41#define CPUID_XFAM 0x0ff00000 /* extended family */ 42#define CPUID_XFAM 0x0ff00000 /* extended family */
42#define CPUID_XFAM_K8 0 43#define CPUID_XFAM_K8 0
43#define CPUID_XMOD 0x000f0000 /* extended model */ 44#define CPUID_XMOD 0x000f0000 /* extended model */
44#define CPUID_XMOD_REV_E 0x00020000 45#define CPUID_XMOD_REV_F 0x00040000
45#define CPUID_USE_XFAM_XMOD 0x00000f00 46#define CPUID_USE_XFAM_XMOD 0x00000f00
46#define CPUID_GET_MAX_CAPABILITIES 0x80000000 47#define CPUID_GET_MAX_CAPABILITIES 0x80000000
47#define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007 48#define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007
@@ -57,25 +58,26 @@ struct powernow_k8_data {
57 58
58/* Field definitions within the FID VID Low Control MSR : */ 59/* Field definitions within the FID VID Low Control MSR : */
59#define MSR_C_LO_INIT_FID_VID 0x00010000 60#define MSR_C_LO_INIT_FID_VID 0x00010000
60#define MSR_C_LO_NEW_VID 0x00001f00 61#define MSR_C_LO_NEW_VID 0x00003f00
61#define MSR_C_LO_NEW_FID 0x0000002f 62#define MSR_C_LO_NEW_FID 0x0000003f
62#define MSR_C_LO_VID_SHIFT 8 63#define MSR_C_LO_VID_SHIFT 8
63 64
64/* Field definitions within the FID VID High Control MSR : */ 65/* Field definitions within the FID VID High Control MSR : */
65#define MSR_C_HI_STP_GNT_TO 0x000fffff 66#define MSR_C_HI_STP_GNT_TO 0x000fffff
66 67
67/* Field definitions within the FID VID Low Status MSR : */ 68/* Field definitions within the FID VID Low Status MSR : */
68#define MSR_S_LO_CHANGE_PENDING 0x80000000 /* cleared when completed */ 69#define MSR_S_LO_CHANGE_PENDING 0x80000000 /* cleared when completed */
69#define MSR_S_LO_MAX_RAMP_VID 0x1f000000 70#define MSR_S_LO_MAX_RAMP_VID 0x3f000000
70#define MSR_S_LO_MAX_FID 0x003f0000 71#define MSR_S_LO_MAX_FID 0x003f0000
71#define MSR_S_LO_START_FID 0x00003f00 72#define MSR_S_LO_START_FID 0x00003f00
72#define MSR_S_LO_CURRENT_FID 0x0000003f 73#define MSR_S_LO_CURRENT_FID 0x0000003f
73 74
74/* Field definitions within the FID VID High Status MSR : */ 75/* Field definitions within the FID VID High Status MSR : */
75#define MSR_S_HI_MAX_WORKING_VID 0x001f0000 76#define MSR_S_HI_MIN_WORKING_VID 0x3f000000
76#define MSR_S_HI_START_VID 0x00001f00 77#define MSR_S_HI_MAX_WORKING_VID 0x003f0000
77#define MSR_S_HI_CURRENT_VID 0x0000001f 78#define MSR_S_HI_START_VID 0x00003f00
78#define MSR_C_HI_STP_GNT_BENIGN 0x00000001 79#define MSR_S_HI_CURRENT_VID 0x0000003f
80#define MSR_C_HI_STP_GNT_BENIGN 0x00000001
79 81
80/* 82/*
81 * There are restrictions frequencies have to follow: 83 * There are restrictions frequencies have to follow:
@@ -99,13 +101,15 @@ struct powernow_k8_data {
99#define MIN_FREQ_RESOLUTION 200 /* fids jump by 2 matching freq jumps by 200 */ 101#define MIN_FREQ_RESOLUTION 200 /* fids jump by 2 matching freq jumps by 200 */
100 102
101#define MAX_FID 0x2a /* Spec only gives FID values as far as 5 GHz */ 103#define MAX_FID 0x2a /* Spec only gives FID values as far as 5 GHz */
102#define LEAST_VID 0x1e /* Lowest (numerically highest) useful vid value */ 104#define LEAST_VID 0x3e /* Lowest (numerically highest) useful vid value */
103 105
104#define MIN_FREQ 800 /* Min and max freqs, per spec */ 106#define MIN_FREQ 800 /* Min and max freqs, per spec */
105#define MAX_FREQ 5000 107#define MAX_FREQ 5000
106 108
107#define INVALID_FID_MASK 0xffffffc1 /* not a valid fid if these bits are set */ 109#define INVALID_FID_MASK 0xffffffc1 /* not a valid fid if these bits are set */
108#define INVALID_VID_MASK 0xffffffe0 /* not a valid vid if these bits are set */ 110#define INVALID_VID_MASK 0xffffffc0 /* not a valid vid if these bits are set */
111
112#define VID_OFF 0x3f
109 113
110#define STOP_GRANT_5NS 1 /* min poss memory access latency for voltage change */ 114#define STOP_GRANT_5NS 1 /* min poss memory access latency for voltage change */
111 115
@@ -121,12 +125,14 @@ struct powernow_k8_data {
121 125
122#define IRT_SHIFT 30 126#define IRT_SHIFT 30
123#define RVO_SHIFT 28 127#define RVO_SHIFT 28
128#define EXT_TYPE_SHIFT 27
124#define PLL_L_SHIFT 20 129#define PLL_L_SHIFT 20
125#define MVS_SHIFT 18 130#define MVS_SHIFT 18
126#define VST_SHIFT 11 131#define VST_SHIFT 11
127#define VID_SHIFT 6 132#define VID_SHIFT 6
128#define IRT_MASK 3 133#define IRT_MASK 3
129#define RVO_MASK 3 134#define RVO_MASK 3
135#define EXT_TYPE_MASK 1
130#define PLL_L_MASK 0x7f 136#define PLL_L_MASK 0x7f
131#define MVS_MASK 3 137#define MVS_MASK 3
132#define VST_MASK 0x7f 138#define VST_MASK 0x7f