diff options
author | Siddha, Suresh B <suresh.b.siddha@intel.com> | 2005-04-16 18:25:11 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:25:11 -0400 |
commit | cf94b62f7005805be0a3ba02c624cb8cd3595bac (patch) | |
tree | 97d170a4f4926cb6ac1b904a51e5681056231883 /arch/i386/kernel/cpu/mtrr/generic.c | |
parent | 1f2c958ad51fed18b23558e2047b98dfa752e689 (diff) |
[PATCH] x86_64-always-use-cpuid-80000008-to-figure-out-mtrr fix
We need to use the size_and_mask in set_mtrr_var_ranges(which is called
while programming MTRR's for AP's
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/cpu/mtrr/generic.c')
-rw-r--r-- | arch/i386/kernel/cpu/mtrr/generic.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/i386/kernel/cpu/mtrr/generic.c b/arch/i386/kernel/cpu/mtrr/generic.c index a4cce454d09b..9f7a7ea6388d 100644 --- a/arch/i386/kernel/cpu/mtrr/generic.c +++ b/arch/i386/kernel/cpu/mtrr/generic.c | |||
@@ -193,7 +193,8 @@ static int set_mtrr_var_ranges(unsigned int index, struct mtrr_var_range *vr) | |||
193 | 193 | ||
194 | rdmsr(MTRRphysBase_MSR(index), lo, hi); | 194 | rdmsr(MTRRphysBase_MSR(index), lo, hi); |
195 | if ((vr->base_lo & 0xfffff0ffUL) != (lo & 0xfffff0ffUL) | 195 | if ((vr->base_lo & 0xfffff0ffUL) != (lo & 0xfffff0ffUL) |
196 | || (vr->base_hi & 0xfUL) != (hi & 0xfUL)) { | 196 | || (vr->base_hi & (size_and_mask >> (32 - PAGE_SHIFT))) != |
197 | (hi & (size_and_mask >> (32 - PAGE_SHIFT)))) { | ||
197 | mtrr_wrmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); | 198 | mtrr_wrmsr(MTRRphysBase_MSR(index), vr->base_lo, vr->base_hi); |
198 | changed = TRUE; | 199 | changed = TRUE; |
199 | } | 200 | } |
@@ -201,7 +202,8 @@ static int set_mtrr_var_ranges(unsigned int index, struct mtrr_var_range *vr) | |||
201 | rdmsr(MTRRphysMask_MSR(index), lo, hi); | 202 | rdmsr(MTRRphysMask_MSR(index), lo, hi); |
202 | 203 | ||
203 | if ((vr->mask_lo & 0xfffff800UL) != (lo & 0xfffff800UL) | 204 | if ((vr->mask_lo & 0xfffff800UL) != (lo & 0xfffff800UL) |
204 | || (vr->mask_hi & 0xfUL) != (hi & 0xfUL)) { | 205 | || (vr->mask_hi & (size_and_mask >> (32 - PAGE_SHIFT))) != |
206 | (hi & (size_and_mask >> (32 - PAGE_SHIFT)))) { | ||
205 | mtrr_wrmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi); | 207 | mtrr_wrmsr(MTRRphysMask_MSR(index), vr->mask_lo, vr->mask_hi); |
206 | changed = TRUE; | 208 | changed = TRUE; |
207 | } | 209 | } |