diff options
author | Li Shaohua <shaohua.li@intel.com> | 2005-06-25 17:54:55 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-06-25 19:24:30 -0400 |
commit | 0bb3184df537002a742bafddf3f4fb482b7fe610 (patch) | |
tree | 97fb252be7efd6d111edbb9c2efb3bb04442c0ec /arch/i386/kernel/cpu/intel.c | |
parent | d720803a9365d360b3e5ea02033f0c11b5b1226a (diff) |
[PATCH] init call cleanup
Trival patch for CPU hotplug. In CPU identify part, only did cleaup for intel
CPUs. Need do for other CPUs if they support S3 SMP.
Signed-off-by: Li Shaohua<shaohua.li@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/cpu/intel.c')
-rw-r--r-- | arch/i386/kernel/cpu/intel.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/i386/kernel/cpu/intel.c b/arch/i386/kernel/cpu/intel.c index 121aa2176e69..96a75d045835 100644 --- a/arch/i386/kernel/cpu/intel.c +++ b/arch/i386/kernel/cpu/intel.c | |||
@@ -28,7 +28,7 @@ extern int trap_init_f00f_bug(void); | |||
28 | struct movsl_mask movsl_mask; | 28 | struct movsl_mask movsl_mask; |
29 | #endif | 29 | #endif |
30 | 30 | ||
31 | void __init early_intel_workaround(struct cpuinfo_x86 *c) | 31 | void __devinit early_intel_workaround(struct cpuinfo_x86 *c) |
32 | { | 32 | { |
33 | if (c->x86_vendor != X86_VENDOR_INTEL) | 33 | if (c->x86_vendor != X86_VENDOR_INTEL) |
34 | return; | 34 | return; |
@@ -43,7 +43,7 @@ void __init early_intel_workaround(struct cpuinfo_x86 *c) | |||
43 | * This is called before we do cpu ident work | 43 | * This is called before we do cpu ident work |
44 | */ | 44 | */ |
45 | 45 | ||
46 | int __init ppro_with_ram_bug(void) | 46 | int __devinit ppro_with_ram_bug(void) |
47 | { | 47 | { |
48 | /* Uses data from early_cpu_detect now */ | 48 | /* Uses data from early_cpu_detect now */ |
49 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && | 49 | if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL && |
@@ -61,7 +61,7 @@ int __init ppro_with_ram_bug(void) | |||
61 | * P4 Xeon errata 037 workaround. | 61 | * P4 Xeon errata 037 workaround. |
62 | * Hardware prefetcher may cause stale data to be loaded into the cache. | 62 | * Hardware prefetcher may cause stale data to be loaded into the cache. |
63 | */ | 63 | */ |
64 | static void __init Intel_errata_workarounds(struct cpuinfo_x86 *c) | 64 | static void __devinit Intel_errata_workarounds(struct cpuinfo_x86 *c) |
65 | { | 65 | { |
66 | unsigned long lo, hi; | 66 | unsigned long lo, hi; |
67 | 67 | ||
@@ -80,7 +80,7 @@ static void __init Intel_errata_workarounds(struct cpuinfo_x86 *c) | |||
80 | /* | 80 | /* |
81 | * find out the number of processor cores on the die | 81 | * find out the number of processor cores on the die |
82 | */ | 82 | */ |
83 | static int __init num_cpu_cores(struct cpuinfo_x86 *c) | 83 | static int __devinit num_cpu_cores(struct cpuinfo_x86 *c) |
84 | { | 84 | { |
85 | unsigned int eax; | 85 | unsigned int eax; |
86 | 86 | ||
@@ -98,7 +98,7 @@ static int __init num_cpu_cores(struct cpuinfo_x86 *c) | |||
98 | return 1; | 98 | return 1; |
99 | } | 99 | } |
100 | 100 | ||
101 | static void __init init_intel(struct cpuinfo_x86 *c) | 101 | static void __devinit init_intel(struct cpuinfo_x86 *c) |
102 | { | 102 | { |
103 | unsigned int l2 = 0; | 103 | unsigned int l2 = 0; |
104 | char *p = NULL; | 104 | char *p = NULL; |
@@ -204,7 +204,7 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 * c, unsigned int size) | |||
204 | return size; | 204 | return size; |
205 | } | 205 | } |
206 | 206 | ||
207 | static struct cpu_dev intel_cpu_dev __initdata = { | 207 | static struct cpu_dev intel_cpu_dev __devinitdata = { |
208 | .c_vendor = "Intel", | 208 | .c_vendor = "Intel", |
209 | .c_ident = { "GenuineIntel" }, | 209 | .c_ident = { "GenuineIntel" }, |
210 | .c_models = { | 210 | .c_models = { |