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authortakada <takada@mbf.nifty.com>2007-01-11 02:15:44 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2007-01-11 21:18:21 -0500
commite4f0ae0ea63caceff37a13f281a72652b7ea71ba (patch)
treeba7384308f606934d1b9d89b870a038e3b31fbd2 /arch/i386/kernel/cpu/cyrix.c
parent56fb5fe9f16f630e3ee663c47c5aff26ac424d05 (diff)
[PATCH] fix typo in geode_configre()@cyrix.c
We write back the wrong register when configuring the Geode processor. Instead of storing to CCR4, it stores to CCR3. Cc: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/cpu/cyrix.c')
-rw-r--r--arch/i386/kernel/cpu/cyrix.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/i386/kernel/cpu/cyrix.c b/arch/i386/kernel/cpu/cyrix.c
index c0c3b59de32c..abcff92f994c 100644
--- a/arch/i386/kernel/cpu/cyrix.c
+++ b/arch/i386/kernel/cpu/cyrix.c
@@ -173,7 +173,7 @@ static void __cpuinit geode_configure(void)
173 ccr4 = getCx86(CX86_CCR4); 173 ccr4 = getCx86(CX86_CCR4);
174 ccr4 |= 0x38; /* FPU fast, DTE cache, Mem bypass */ 174 ccr4 |= 0x38; /* FPU fast, DTE cache, Mem bypass */
175 175
176 setCx86(CX86_CCR3, ccr3); 176 setCx86(CX86_CCR4, ccr4);
177 177
178 set_cx86_memwb(); 178 set_cx86_memwb();
179 set_cx86_reorder(); 179 set_cx86_reorder();