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authorLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 16:07:55 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-09-26 16:07:55 -0400
commitb278240839e20fa9384ea430df463b367b90e04e (patch)
treef99f0c8cdd4cc7f177cd75440e6bd181cded7fb3 /arch/i386/kernel/cpu/common.c
parentdd77a4ee0f3981693d4229aa1d57cea9e526ff47 (diff)
parent3f75f42d7733e73aca5c78326489efd4189e0111 (diff)
Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (225 commits) [PATCH] Don't set calgary iommu as default y [PATCH] i386/x86-64: New Intel feature flags [PATCH] x86: Add a cumulative thermal throttle event counter. [PATCH] i386: Make the jiffies compares use the 64bit safe macros. [PATCH] x86: Refactor thermal throttle processing [PATCH] Add 64bit jiffies compares (for use with get_jiffies_64) [PATCH] Fix unwinder warning in traps.c [PATCH] x86: Allow disabling early pci scans with pci=noearly or disallowing conf1 [PATCH] x86: Move direct PCI scanning functions out of line [PATCH] i386/x86-64: Make all early PCI scans dependent on CONFIG_PCI [PATCH] Don't leak NT bit into next task [PATCH] i386/x86-64: Work around gcc bug with noreturn functions in unwinder [PATCH] Fix some broken white space in ia32_signal.c [PATCH] Initialize argument registers for 32bit signal handlers. [PATCH] Remove all traces of signal number conversion [PATCH] Don't synchronize time reading on single core AMD systems [PATCH] Remove outdated comment in x86-64 mmconfig code [PATCH] Use string instructions for Core2 copy/clear [PATCH] x86: - restore i8259A eoi status on resume [PATCH] i386: Split multi-line printk in oops output. ...
Diffstat (limited to 'arch/i386/kernel/cpu/common.c')
-rw-r--r--arch/i386/kernel/cpu/common.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/i386/kernel/cpu/common.c b/arch/i386/kernel/cpu/common.c
index 70c87de582c7..2799baaadf45 100644
--- a/arch/i386/kernel/cpu/common.c
+++ b/arch/i386/kernel/cpu/common.c
@@ -36,7 +36,7 @@ struct cpu_dev * cpu_devs[X86_VENDOR_NUM] = {};
36 36
37extern int disable_pse; 37extern int disable_pse;
38 38
39static void default_init(struct cpuinfo_x86 * c) 39static void __cpuinit default_init(struct cpuinfo_x86 * c)
40{ 40{
41 /* Not much we can do here... */ 41 /* Not much we can do here... */
42 /* Check if at least it has cpuid */ 42 /* Check if at least it has cpuid */
@@ -49,7 +49,7 @@ static void default_init(struct cpuinfo_x86 * c)
49 } 49 }
50} 50}
51 51
52static struct cpu_dev default_cpu = { 52static struct cpu_dev __cpuinitdata default_cpu = {
53 .c_init = default_init, 53 .c_init = default_init,
54 .c_vendor = "Unknown", 54 .c_vendor = "Unknown",
55}; 55};
@@ -265,7 +265,7 @@ static void __init early_cpu_detect(void)
265 } 265 }
266} 266}
267 267
268void __cpuinit generic_identify(struct cpuinfo_x86 * c) 268static void __cpuinit generic_identify(struct cpuinfo_x86 * c)
269{ 269{
270 u32 tfms, xlvl; 270 u32 tfms, xlvl;
271 int ebx; 271 int ebx;
@@ -675,7 +675,7 @@ old_gdt:
675#endif 675#endif
676 676
677 /* Clear %fs and %gs. */ 677 /* Clear %fs and %gs. */
678 asm volatile ("xorl %eax, %eax; movl %eax, %fs; movl %eax, %gs"); 678 asm volatile ("movl %0, %%fs; movl %0, %%gs" : : "r" (0));
679 679
680 /* Clear all 6 debug registers: */ 680 /* Clear all 6 debug registers: */
681 set_debugreg(0, 0); 681 set_debugreg(0, 0);