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author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-07 11:59:11 -0500 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-07 11:59:11 -0500 |
commit | 4522d58275f124105819723e24e912c8e5bf3cdd (patch) | |
tree | b92c29014fadffe049c1925676037f0092b8d112 /arch/i386/kernel/apic.c | |
parent | 6cf24f031bc97cb5a7c9df3b6e73c45b628b2b28 (diff) | |
parent | 64a26a731235b59c9d73bbe82c1f896d57400d37 (diff) |
Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (156 commits)
[PATCH] x86-64: Export smp_call_function_single
[PATCH] i386: Clean up smp_tune_scheduling()
[PATCH] unwinder: move .eh_frame to RODATA
[PATCH] unwinder: fully support linker generated .eh_frame_hdr section
[PATCH] x86-64: don't use set_irq_regs()
[PATCH] x86-64: check vector in setup_ioapic_dest to verify if need setup_IO_APIC_irq
[PATCH] x86-64: Make ix86 default to HIGHMEM4G instead of NOHIGHMEM
[PATCH] i386: replace kmalloc+memset with kzalloc
[PATCH] x86-64: remove remaining pc98 code
[PATCH] x86-64: remove unused variable
[PATCH] x86-64: Fix constraints in atomic_add_return()
[PATCH] x86-64: fix asm constraints in i386 atomic_add_return
[PATCH] x86-64: Correct documentation for bzImage protocol v2.05
[PATCH] x86-64: replace kmalloc+memset with kzalloc in MTRR code
[PATCH] x86-64: Fix numaq build error
[PATCH] x86-64: include/asm-x86_64/cpufeature.h isn't a userspace header
[PATCH] unwinder: Add debugging output to the Dwarf2 unwinder
[PATCH] x86-64: Clarify error message in GART code
[PATCH] x86-64: Fix interrupt race in idle callback (3rd try)
[PATCH] x86-64: Remove unwind stack pointer alignment forcing again
...
Fixed conflict in include/linux/uaccess.h manually
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/i386/kernel/apic.c')
-rw-r--r-- | arch/i386/kernel/apic.c | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c index 2fd4b7d927c2..776d9be26af9 100644 --- a/arch/i386/kernel/apic.c +++ b/arch/i386/kernel/apic.c | |||
@@ -647,23 +647,30 @@ static struct { | |||
647 | static int lapic_suspend(struct sys_device *dev, pm_message_t state) | 647 | static int lapic_suspend(struct sys_device *dev, pm_message_t state) |
648 | { | 648 | { |
649 | unsigned long flags; | 649 | unsigned long flags; |
650 | int maxlvt; | ||
650 | 651 | ||
651 | if (!apic_pm_state.active) | 652 | if (!apic_pm_state.active) |
652 | return 0; | 653 | return 0; |
653 | 654 | ||
655 | maxlvt = get_maxlvt(); | ||
656 | |||
654 | apic_pm_state.apic_id = apic_read(APIC_ID); | 657 | apic_pm_state.apic_id = apic_read(APIC_ID); |
655 | apic_pm_state.apic_taskpri = apic_read(APIC_TASKPRI); | 658 | apic_pm_state.apic_taskpri = apic_read(APIC_TASKPRI); |
656 | apic_pm_state.apic_ldr = apic_read(APIC_LDR); | 659 | apic_pm_state.apic_ldr = apic_read(APIC_LDR); |
657 | apic_pm_state.apic_dfr = apic_read(APIC_DFR); | 660 | apic_pm_state.apic_dfr = apic_read(APIC_DFR); |
658 | apic_pm_state.apic_spiv = apic_read(APIC_SPIV); | 661 | apic_pm_state.apic_spiv = apic_read(APIC_SPIV); |
659 | apic_pm_state.apic_lvtt = apic_read(APIC_LVTT); | 662 | apic_pm_state.apic_lvtt = apic_read(APIC_LVTT); |
660 | apic_pm_state.apic_lvtpc = apic_read(APIC_LVTPC); | 663 | if (maxlvt >= 4) |
664 | apic_pm_state.apic_lvtpc = apic_read(APIC_LVTPC); | ||
661 | apic_pm_state.apic_lvt0 = apic_read(APIC_LVT0); | 665 | apic_pm_state.apic_lvt0 = apic_read(APIC_LVT0); |
662 | apic_pm_state.apic_lvt1 = apic_read(APIC_LVT1); | 666 | apic_pm_state.apic_lvt1 = apic_read(APIC_LVT1); |
663 | apic_pm_state.apic_lvterr = apic_read(APIC_LVTERR); | 667 | apic_pm_state.apic_lvterr = apic_read(APIC_LVTERR); |
664 | apic_pm_state.apic_tmict = apic_read(APIC_TMICT); | 668 | apic_pm_state.apic_tmict = apic_read(APIC_TMICT); |
665 | apic_pm_state.apic_tdcr = apic_read(APIC_TDCR); | 669 | apic_pm_state.apic_tdcr = apic_read(APIC_TDCR); |
666 | apic_pm_state.apic_thmr = apic_read(APIC_LVTTHMR); | 670 | #ifdef CONFIG_X86_MCE_P4THERMAL |
671 | if (maxlvt >= 5) | ||
672 | apic_pm_state.apic_thmr = apic_read(APIC_LVTTHMR); | ||
673 | #endif | ||
667 | 674 | ||
668 | local_irq_save(flags); | 675 | local_irq_save(flags); |
669 | disable_local_APIC(); | 676 | disable_local_APIC(); |
@@ -675,10 +682,13 @@ static int lapic_resume(struct sys_device *dev) | |||
675 | { | 682 | { |
676 | unsigned int l, h; | 683 | unsigned int l, h; |
677 | unsigned long flags; | 684 | unsigned long flags; |
685 | int maxlvt; | ||
678 | 686 | ||
679 | if (!apic_pm_state.active) | 687 | if (!apic_pm_state.active) |
680 | return 0; | 688 | return 0; |
681 | 689 | ||
690 | maxlvt = get_maxlvt(); | ||
691 | |||
682 | local_irq_save(flags); | 692 | local_irq_save(flags); |
683 | 693 | ||
684 | /* | 694 | /* |
@@ -700,8 +710,12 @@ static int lapic_resume(struct sys_device *dev) | |||
700 | apic_write(APIC_SPIV, apic_pm_state.apic_spiv); | 710 | apic_write(APIC_SPIV, apic_pm_state.apic_spiv); |
701 | apic_write(APIC_LVT0, apic_pm_state.apic_lvt0); | 711 | apic_write(APIC_LVT0, apic_pm_state.apic_lvt0); |
702 | apic_write(APIC_LVT1, apic_pm_state.apic_lvt1); | 712 | apic_write(APIC_LVT1, apic_pm_state.apic_lvt1); |
703 | apic_write(APIC_LVTTHMR, apic_pm_state.apic_thmr); | 713 | #ifdef CONFIG_X86_MCE_P4THERMAL |
704 | apic_write(APIC_LVTPC, apic_pm_state.apic_lvtpc); | 714 | if (maxlvt >= 5) |
715 | apic_write(APIC_LVTTHMR, apic_pm_state.apic_thmr); | ||
716 | #endif | ||
717 | if (maxlvt >= 4) | ||
718 | apic_write(APIC_LVTPC, apic_pm_state.apic_lvtpc); | ||
705 | apic_write(APIC_LVTT, apic_pm_state.apic_lvtt); | 719 | apic_write(APIC_LVTT, apic_pm_state.apic_lvtt); |
706 | apic_write(APIC_TDCR, apic_pm_state.apic_tdcr); | 720 | apic_write(APIC_TDCR, apic_pm_state.apic_tdcr); |
707 | apic_write(APIC_TMICT, apic_pm_state.apic_tmict); | 721 | apic_write(APIC_TMICT, apic_pm_state.apic_tmict); |