diff options
author | Richard Kuo <rkuo@codeaurora.org> | 2013-02-05 15:23:37 -0500 |
---|---|---|
committer | Richard Kuo <rkuo@codeaurora.org> | 2013-04-30 20:40:25 -0400 |
commit | f167063a0c4e97dfbd8e42df76e71022bb2bdb7f (patch) | |
tree | 155b0aa8067ea70d5f1eb6516f6e7a44bfbe1798 /arch/hexagon/include | |
parent | 2b3c744c3bcaab14ad2cc0f067d76c2f119085a5 (diff) |
Hexagon: switch to using the device type for IO mappings
Uncached on our architecture can still have side effects
such as canceled/replayed transactions; device type prevents
this.
Signed-off-by: Richard Kuo <rkuo@codeaurora.org>
Diffstat (limited to 'arch/hexagon/include')
-rw-r--r-- | arch/hexagon/include/asm/vm_mmu.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/hexagon/include/asm/vm_mmu.h b/arch/hexagon/include/asm/vm_mmu.h index 9a94de7969bb..e67b573cfef0 100644 --- a/arch/hexagon/include/asm/vm_mmu.h +++ b/arch/hexagon/include/asm/vm_mmu.h | |||
@@ -68,14 +68,13 @@ | |||
68 | 68 | ||
69 | #define __HEXAGON_C_WB 0x0 /* Write-back, no L2 */ | 69 | #define __HEXAGON_C_WB 0x0 /* Write-back, no L2 */ |
70 | #define __HEXAGON_C_WT 0x1 /* Write-through, no L2 */ | 70 | #define __HEXAGON_C_WT 0x1 /* Write-through, no L2 */ |
71 | #define __HEXAGON_C_UNC 0x6 /* Uncached memory */ | ||
72 | #if CONFIG_HEXAGON_ARCH_VERSION >= 2 | ||
71 | #define __HEXAGON_C_DEV 0x4 /* Device register space */ | 73 | #define __HEXAGON_C_DEV 0x4 /* Device register space */ |
72 | #define __HEXAGON_C_WT_L2 0x5 /* Write-through, with L2 */ | ||
73 | /* this really should be #if CONFIG_HEXAGON_ARCH = 2 but that's not defined */ | ||
74 | #if defined(CONFIG_HEXAGON_COMET) || defined(CONFIG_QDSP6_ST1) | ||
75 | #define __HEXAGON_C_UNC __HEXAGON_C_DEV | ||
76 | #else | 74 | #else |
77 | #define __HEXAGON_C_UNC 0x6 /* Uncached memory */ | 75 | #define __HEXAGON_C_DEV __HEXAGON_C_UNC |
78 | #endif | 76 | #endif |
77 | #define __HEXAGON_C_WT_L2 0x5 /* Write-through, with L2 */ | ||
79 | #define __HEXAGON_C_WB_L2 0x7 /* Write-back, with L2 */ | 78 | #define __HEXAGON_C_WB_L2 0x7 /* Write-back, with L2 */ |
80 | 79 | ||
81 | /* | 80 | /* |