diff options
author | David Howells <dhowells@redhat.com> | 2010-05-28 05:41:16 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-28 13:17:21 -0400 |
commit | 8507bb0062bff1431bbcce921efe5cd1186fcff2 (patch) | |
tree | 439c0436112ac225e7b2dbd020fc2083c4b45044 /arch/frv | |
parent | 29d03fa12bc02c0f8085cd6bb06d11359a4bccaf (diff) |
FRV: ARCH_KMALLOC_MINALIGN was already defined
ARCH_KMALLOC_MINALIGN was already defined in asm/mem-layout.h and so shouldn't
have been added to asm/cache.h as well, but rather altered in place.
The commit that added it to asm/cache.h was:
commit 69dcf3db03626c4f18de624e8632454ea12ff260
Author: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Date: Mon May 24 14:32:54 2010 -0700
frv: set ARCH_KMALLOC_MINALIGN
Architectures that handle DMA-non-coherent memory need to set
ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is
DMA-safe: the buffer doesn't share a cache with the others.
Signed-off-by: David Howells <dhowells@redhat.com>
cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/frv')
-rw-r--r-- | arch/frv/include/asm/cache.h | 2 | ||||
-rw-r--r-- | arch/frv/include/asm/mem-layout.h | 4 |
2 files changed, 2 insertions, 4 deletions
diff --git a/arch/frv/include/asm/cache.h b/arch/frv/include/asm/cache.h index 7dc0f0f85b7c..2797163b8f4f 100644 --- a/arch/frv/include/asm/cache.h +++ b/arch/frv/include/asm/cache.h | |||
@@ -17,8 +17,6 @@ | |||
17 | #define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT) | 17 | #define L1_CACHE_SHIFT (CONFIG_FRV_L1_CACHE_SHIFT) |
18 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) | 18 | #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) |
19 | 19 | ||
20 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES | ||
21 | |||
22 | #define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) | 20 | #define __cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) |
23 | #define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) | 21 | #define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES))) |
24 | 22 | ||
diff --git a/arch/frv/include/asm/mem-layout.h b/arch/frv/include/asm/mem-layout.h index 2947764fc0e0..ccae981876fa 100644 --- a/arch/frv/include/asm/mem-layout.h +++ b/arch/frv/include/asm/mem-layout.h | |||
@@ -35,8 +35,8 @@ | |||
35 | * the slab must be aligned such that load- and store-double instructions don't | 35 | * the slab must be aligned such that load- and store-double instructions don't |
36 | * fault if used | 36 | * fault if used |
37 | */ | 37 | */ |
38 | #define ARCH_KMALLOC_MINALIGN 8 | 38 | #define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES |
39 | #define ARCH_SLAB_MINALIGN 8 | 39 | #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES |
40 | 40 | ||
41 | /*****************************************************************************/ | 41 | /*****************************************************************************/ |
42 | /* | 42 | /* |